[coreboot] unstable AMD Fam10h boot

Marc Jones marcj303 at gmail.com
Tue Sep 15 18:10:38 CEST 2009

On Mon, Sep 14, 2009 at 7:51 PM, Bao, Zheng <Zheng.Bao at amd.com> wrote:
> Are you sure the pci functions will cover the case that the address is
> more than 0x100?

It should, unless you know something I don't (bug?). Using the MMIO
config access is the preferred method since it enforces the ordering.
See 2.11 Configuration Space in the BKDG.



More information about the coreboot mailing list