[coreboot] BIOS RAM in AMD SB7XX southbridges ?

[Peter Stuge]

Darmawan Salihun wrote:
> What is the BIOS RAM in AMD SB7XX used for?

It will for example be used to store RAM configuration parameters
when the system is suspended.


> Is it to buffer the BIOS contents from SPI flash chip prior to
> execution of the very first instruction?

No.


> I recall that it's impossible to execute code directly in an SPI chip.

It is not only possible but quickly becoming the most common flash
chip interface.


> I see. So, there must be some sort of independent
> microcontroller/microprocessor in the southbridge that "fetches" the
> contents of the SPI chip and "present" it in a "memory-mapped way"
> to the CPU.

A microcontroller is too slow. An SPI master is just a simple state
machine. SPI is a very simple protocol. Typically you will find that
southbridge or worst case superio has an SPI master which
subtractively decodes the BIOS memory range onto SPI. Accesses come
from the CPU to chipset usually then to LPC and finally to SPI. All
these bridges are transparent to the CPU.


Andriy Gapon wrote:
> No, I think.  "BIOS RAM" is some sort of scratch-pad memory for
> arbitrary use by software.

Correct.


//Peter