[coreboot] [Fwd: Re: [Fwd: Re: [Fwd: Re: arima hdama problem]]]
Hugh Greenberg
hng at lanl.gov
Fri Oct 30 01:03:37 CET 2009
Attached is the output after applying this patch.
On Thu, 2009-10-29 at 16:55 -0600, Myles Watson wrote:
> Would you try this patch?
>
> I'm having problems where PCI config writes aren't working correctly,
> and I'm wondering if you are too.
>
> Thanks,
> Myles
-------------- next part --------------
coreboot-2.3 Thu Oct 29 17:48:30 MDT 2009 starting...
Enabling routing table for node 00 done.
Enabling SMP settings
(0,1) link=01
(1,0) link=01
setup_remote_node: done
Renaming current temporary node to 01 done.
Enabling routing table for node 01 done.
02 nodes initialized.
coherent_ht_finalize
done
started ap apicid:
SBLink=00
NC node|link=00
entering ht_optimize_link
pos=0x8a, unfiltered freq_cap=0x8075
pos=0x8a, filtered freq_cap=0x35
pos=0xce, unfiltered freq_cap=0x35
freq_cap1=0x35, freq_cap2=0x15
dev1 old_freq=0x0, freq=0x4, needs_reset=0x1
dev2 old_freq=0x0, freq=0x4, needs_reset=0x1
width_cap1=0x11, width_cap2=0x11
dev1 input ln_width1=0x4, ln_width2=0x4
dev1 input width=0x1
dev1 output ln_width1=0x4, ln_width2=0x4
dev1 input|output width=0x11
old dev1 input|output width=0x11
dev2 input|output width=0x11
old dev2 input|output width=0x11
entering ht_optimize_link
pos=0xd2, unfiltered freq_cap=0x35
pos=0xce, unfiltered freq_cap=0x1
pos=0xce, filtered freq_cap=0x1
freq_cap1=0x15, freq_cap2=0x1
dev1 old_freq=0x0, freq=0x0, needs_reset=0x0
dev2 old_freq=0x0, freq=0x0, needs_reset=0x0
width_cap1=0x0, width_cap2=0x0
dev1 input ln_width1=0x3, ln_width2=0x3
dev1 input width=0x0
dev1 output ln_width1=0x3, ln_width2=0x3
dev1 input|output width=0x0
old dev1 input|output width=0x0
dev2 input|output width=0x0
old dev2 input|output width=0x0
ht reset -
coreboot-2.3 Thu Oct 29 17:48:30 MDT 2009 starting...
Enabling routing table for node 00 done.
Enabling SMP settings
(0,1) link=01
(1,0) link=01
setup_remote_node: done
Renaming current temporary node to 01 done.
Enabling routing table for node 01 done.
02 nodes initialized.
coherent_ht_finalize
done
started ap apicid:
SBLink=00
NC node|link=00
entering ht_optimize_link
pos=0x8a, unfiltered freq_cap=0x8075
pos=0x8a, filtered freq_cap=0x35
pos=0xce, unfiltered freq_cap=0x35
freq_cap1=0x35, freq_cap2=0x15
dev1 old_freq=0x4, freq=0x4, needs_reset=0x0
dev2 old_freq=0x4, freq=0x4, needs_reset=0x0
width_cap1=0x11, width_cap2=0x11
dev1 input ln_width1=0x4, ln_width2=0x4
dev1 input width=0x1
dev1 output ln_width1=0x4, ln_width2=0x4
dev1 input|output width=0x11
old dev1 input|output width=0x11
dev2 input|output width=0x11
old dev2 input|output width=0x11
entering ht_optimize_link
pos=0xd2, unfiltered freq_cap=0x35
pos=0xce, unfiltered freq_cap=0x1
pos=0xce, filtered freq_cap=0x1
freq_cap1=0x15, freq_cap2=0x1
dev1 old_freq=0x0, freq=0x0, needs_reset=0x0
dev2 old_freq=0x0, freq=0x0, needs_reset=0x0
width_cap1=0x0, width_cap2=0x0
dev1 input ln_width1=0x3, ln_width2=0x3
dev1 input width=0x0
dev1 output ln_width1=0x3, ln_width2=0x3
dev1 input|output width=0x0
old dev1 input|output width=0x0
dev2 input|output width=0x0
old dev2 input|output width=0x0
SMBus controller enabled
Ram1.00
setting up CPU00 northbridge registers
done.
Ram1.01
setting up CPU01 northbridge registers
done.
Ram2.00
Enabling dual channel memory
Registered
166Mhz
RAM end at 0x00100000 kB
Lower RAM end at 0x00100000 kB
Ram2.01
Enabling dual channel memory
Registered
166Mhz
RAM end at 0x00200000 kB
Lower RAM end at 0x00200000 kB
Ram3
ECC enabled
ECC enabled
Initializing memory: done
Initializing memory: done
Ram4
v_esp=000cedbc
testx = 5a5a5a5a
Copying data from cache to RAM -- switching to use RAM as stack... Done
testx = 5a5a5a5a
Disabling cache as ram now
Clearing initial memory region: Done
Loading stage image.
Check CBFS header at fffeffe0
magic is 4f524243
Found CBFS header at fffeffe0
Check fallback/coreboot_ram
Stage: loading fallback/coreboot_ram @ 0x100000 (409600 bytes), entry @ 0x100000
Stage: done loading.
Jumping to image.
coreboot-2.3 Thu Oct 29 17:51:54 MDT 2009 booting...
Enumerating buses...
Show all devs...Before Device Enumeration.
Root Device: enabled 1, 0 resources
APIC_CLUSTER: 0: enabled 1, 0 resources
APIC: 00: enabled 1, 0 resources
PCI_DOMAIN: 0000: enabled 1, 0 resources
PCI: 00:18.0: enabled 1, 0 resources
PCI: 00:00.0: enabled 1, 0 resources
PCI: 00:00.1: enabled 1, 0 resources
PCI: 00:01.0: enabled 1, 0 resources
PCI: 00:01.1: enabled 1, 0 resources
PCI: 00:00.0: enabled 1, 0 resources
PCI: 00:00.0: enabled 1, 0 resources
PCI: 00:00.1: enabled 1, 0 resources
PCI: 00:00.2: enabled 0, 0 resources
PCI: 00:01.0: enabled 0, 0 resources
PCI: 00:06.0: enabled 1, 0 resources
PCI: 00:01.0: enabled 1, 0 resources
PNP: 002e.0: enabled 0, 3 resources
PNP: 002e.1: enabled 0, 2 resources
PNP: 002e.2: enabled 0, 2 resources
PNP: 002e.3: enabled 1, 2 resources
PNP: 002e.4: enabled 0, 0 resources
PNP: 002e.5: enabled 0, 0 resources
PNP: 002e.6: enabled 1, 3 resources
PNP: 002e.7: enabled 0, 0 resources
PNP: 002e.8: enabled 0, 0 resources
PNP: 002e.9: enabled 0, 0 resources
PNP: 002e.a: enabled 0, 0 resources
PCI: 00:01.1: enabled 1, 0 resources
PCI: 00:01.2: enabled 1, 0 resources
PCI: 00:01.3: enabled 1, 0 resources
I2C: 00:70: enabled 1, 0 resources
I2C: 00:2c: enabled 1, 0 resources
I2C: 00:50: enabled 1, 0 resources
I2C: 00:51: enabled 1, 0 resources
I2C: 00:52: enabled 1, 0 resources
I2C: 00:53: enabled 1, 0 resources
I2C: 00:54: enabled 1, 0 resources
I2C: 00:55: enabled 1, 0 resources
I2C: 00:56: enabled 1, 0 resources
I2C: 00:57: enabled 1, 0 resources
PCI: 00:01.5: enabled 0, 0 resources
PCI: 00:01.6: enabled 1, 0 resources
PCI: 00:18.1: enabled 1, 0 resources
PCI: 00:18.2: enabled 1, 0 resources
PCI: 00:18.3: enabled 1, 0 resources
PCI: 00:19.0: enabled 1, 0 resources
PCI: 00:19.1: enabled 1, 0 resources
PCI: 00:19.2: enabled 1, 0 resources
PCI: 00:19.3: enabled 1, 0 resources
Compare with tree...
Root Device: enabled 1, 0 resources
APIC_CLUSTER: 0: enabled 1, 0 resources
APIC: 00: enabled 1, 0 resources
PCI_DOMAIN: 0000: enabled 1, 0 resources
PCI: 00:18.0: enabled 1, 0 resources
PCI: 00:00.0: enabled 1, 0 resources
PCI: 00:00.1: enabled 1, 0 resources
PCI: 00:01.0: enabled 1, 0 resources
PCI: 00:01.1: enabled 1, 0 resources
PCI: 00:00.0: enabled 1, 0 resources
PCI: 00:00.0: enabled 1, 0 resources
PCI: 00:00.1: enabled 1, 0 resources
PCI: 00:00.2: enabled 0, 0 resources
PCI: 00:01.0: enabled 0, 0 resources
PCI: 00:06.0: enabled 1, 0 resources
PCI: 00:01.0: enabled 1, 0 resources
PNP: 002e.0: enabled 0, 3 resources
PNP: 002e.1: enabled 0, 2 resources
PNP: 002e.2: enabled 0, 2 resources
PNP: 002e.3: enabled 1, 2 resources
PNP: 002e.4: enabled 0, 0 resources
PNP: 002e.5: enabled 0, 0 resources
PNP: 002e.6: enabled 1, 3 resources
PNP: 002e.7: enabled 0, 0 resources
PNP: 002e.8: enabled 0, 0 resources
PNP: 002e.9: enabled 0, 0 resources
PNP: 002e.a: enabled 0, 0 resources
PCI: 00:01.1: enabled 1, 0 resources
PCI: 00:01.2: enabled 1, 0 resources
PCI: 00:01.3: enabled 1, 0 resources
I2C: 00:70: enabled 1, 0 resources
I2C: 00:2c: enabled 1, 0 resources
I2C: 00:50: enabled 1, 0 resources
I2C: 00:51: enabled 1, 0 resources
I2C: 00:52: enabled 1, 0 resources
I2C: 00:53: enabled 1, 0 resources
I2C: 00:54: enabled 1, 0 resources
I2C: 00:55: enabled 1, 0 resources
I2C: 00:56: enabled 1, 0 resources
I2C: 00:57: enabled 1, 0 resources
PCI: 00:01.5: enabled 0, 0 resources
PCI: 00:01.6: enabled 1, 0 resources
PCI: 00:18.1: enabled 1, 0 resources
PCI: 00:18.2: enabled 1, 0 resources
PCI: 00:18.3: enabled 1, 0 resources
PCI: 00:19.0: enabled 1, 0 resources
PCI: 00:19.1: enabled 1, 0 resources
PCI: 00:19.2: enabled 1, 0 resources
PCI: 00:19.3: enabled 1, 0 resources
scan_static_bus for Root Device
APIC_CLUSTER: 0 enabled
PCI_DOMAIN: 0000 enabled
APIC_CLUSTER: 0 scanning...
PCI: 00:18.3 siblings=0
CPU: APIC: 00 enabled
PCI: 00:19.3 siblings=0
malloc Enter, size 1100, free_mem_ptr 00160000
malloc 00160000
CPU: APIC: 01 enabled
PCI_DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:18.0 [1022/1100] bus ops
PCI: 00:18.0 [1022/1100] enabled
PCI: 00:18.1 [1022/1101] enabled
PCI: 00:18.2 [1022/1102] enabled
PCI: 00:18.3 [1022/1103] ops
PCI: 00:18.3 [1022/1103] enabled
PCI: 00:18.4, bad id 0xffffffff
PCI: 00:18.5, bad id 0xffffffff
PCI: 00:18.6, bad id 0xffffffff
PCI: 00:18.7, bad id 0xffffffff
PCI: 00:19.0 [1022/1100] bus ops
PCI: 00:19.0 [1022/1100] enabled
PCI: 00:19.1 [1022/1101] enabled
PCI: 00:19.2 [1022/1102] enabled
PCI: 00:19.3 [1022/1103] ops
PCI: 00:19.3 [1022/1103] enabled
PCI: 00:19.4, bad id 0xffffffff
PCI: 00:19.5, bad id 0xffffffff
PCI: 00:19.6, bad id 0xffffffff
PCI: 00:19.7, bad id 0xffffffff
PCI: 00:1a.0, bad id 0xffffffff
PCI: 00:1b.0, bad id 0xffffffff
PCI: 00:1c.0, bad id 0xffffffff
PCI: 00:1d.0, bad id 0xffffffff
PCI: 00:1e.0, bad id 0xffffffff
PCI: 00:1f.0, bad id 0xffffffff
pci_check_direct
PCI: Forcing configuration type 1
Capability: type 0x07 @ 0xa0
Capability: type 0x08 @ 0xb8
flags: 0x8000
Capability: type 0x07 @ 0xa0
Capability: type 0x08 @ 0xb8
Capability: type 0x08 @ 0xc0
flags: 0x0041
Collapsing PCI: 01:01.0 [1022/7450]
Capability: type 0x08 @ 0xc0
flags: 0x0083
Collapsing PCI: 01:03.0 [1022/7460]
PCI: 01:00.0 [1022/7450] bus ops
PCI: 01:00.0 [1022/7450] enabled
Capability: type 0x07 @ 0xa0
Capability: type 0x08 @ 0xb8
flags: 0x8000
Capability: type 0x07 @ 0xa0
Capability: type 0x08 @ 0xb8
Capability: type 0x08 @ 0xc0
flags: 0x0040
PCI: 01:01.0 count: 0002 static_count: 0002
PCI: 01:01.0 [1022/7450] enabled next_unitid: 0003
PCI: 01:00.0 [1022/7460] bus ops
PCI: 01:00.0 [1022/7460] enabled
Capability: type 0x08 @ 0xc0
flags: 0x0080
PCI: 01:03.0 count: 0004 static_count: 0002
PCI: 01:03.0 [1022/7460] enabled next_unitid: 0007
PCI: pci_scan_bus for bus 01
PCI: 01:00.0, bad id 0xffffffff
PCI: 01:01.0 [1022/7450] enabled
PCI: 01:01.1 [1022/7451] ops
PCI: 01:01.1 [1022/7451] enabled
PCI: 01:01.2, bad id 0xffffffff
PCI: 01:01.3, bad id 0xffffffff
PCI: 01:01.4, bad id 0xffffffff
PCI: 01:01.5, bad id 0xffffffff
PCI: 01:01.6, bad id 0xffffffff
PCI: 01:01.7, bad id 0xffffffff
PCI: 01:02.0 [1022/7450] bus ops
PCI: 01:02.0 [1022/7450] enabled
PCI: 01:02.1 [1022/7451] ops
PCI: 01:02.1 [1022/7451] enabled
PCI: 01:02.2, bad id 0xffffffff
PCI: 01:02.3, bad id 0xffffffff
PCI: 01:02.4, bad id 0xffffffff
PCI: 01:02.5, bad id 0xffffffff
PCI: 01:02.6, bad id 0xffffffff
PCI: 01:02.7, bad id 0xffffffff
PCI: 01:03.0 [1022/7460] enabled
PCI: 01:04.0 [1022/7468] bus ops
PCI: 01:04.0 [1022/7468] enabled
PCI: 01:04.1 [1022/7469] ops
PCI: 01:04.1 [1022/7469] enabled
PCI: 01:04.2 [1022/746a] bus ops
PCI: 01:04.2 [1022/746a] enabled
PCI: 01:04.3 [1022/746b] bus ops
PCI: 01:04.3 [1022/746b] enabled
PCI: 01:04.4, bad id 0x0
PCI: 01:04.6 [1022/746e] ops
PCI: 01:04.6 [1022/746e] enabled
PCI: 01:04.7, bad id 0x0
PCI: 01:05.0, bad id 0xffffffff
PCI: 01:06.0, bad id 0xffffffff
do_pci_scan_bridge for PCI: 01:01.0
PCI: pci_scan_bus for bus 02
PCI: 02:00.0, bad id 0xffffffff
PCI: 02:01.0, bad id 0xffffffff
PCI: 02:02.0, bad id 0xffffffff
malloc Enter, size 1100, free_mem_ptr 0016044c
malloc 0016044c
PCI: 02:03.0 [14e4/16a6] enabled
malloc Enter, size 1100, free_mem_ptr 00160898
malloc 00160898
PCI: 02:04.0 [14e4/16a6] enabled
PCI: 02:05.0, bad id 0xffffffff
PCI: 02:06.0, bad id 0xffffffff
PCI: 02:07.0, bad id 0xffffffff
PCI: 02:08.0, bad id 0xffffffff
PCI: 02:09.0, bad id 0xffffffff
PCI: 02:0a.0, bad id 0xffffffff
PCI: 02:0b.0, bad id 0xffffffff
PCI: 02:0c.0, bad id 0xffffffff
PCI: 02:0d.0, bad id 0xffffffff
PCI: 02:0e.0, bad id 0xffffffff
PCI: 02:0f.0, bad id 0xffffffff
PCI: 02:10.0, bad id 0xffffffff
PCI: 02:11.0, bad id 0xffffffff
PCI: 02:12.0, bad id 0xffffffff
PCI: 02:13.0, bad id 0xffffffff
PCI: 02:14.0, bad id 0xffffffff
PCI: 02:15.0, bad id 0xffffffff
PCI: 02:16.0, bad id 0xffffffff
PCI: 02:17.0, bad id 0xffffffff
PCI: 02:18.0, bad id 0xffffffff
PCI: 02:19.0, bad id 0xffffffff
PCI: 02:1a.0, bad id 0xffffffff
PCI: 02:1b.0, bad id 0xffffffff
PCI: 02:1c.0, bad id 0xffffffff
PCI: 02:1d.0, bad id 0xffffffff
PCI: 02:1e.0, bad id 0xffffffff
PCI: 02:1f.0, bad id 0xffffffff
PCI: pci_scan_bus returning with max=002
Capability: type 0x07 @ 0xa0
PCI: 02: Conventional PCI
do_pci_scan_bridge returns max 2
do_pci_scan_bridge for PCI: 01:02.0
PCI: pci_scan_bus for bus 03
PCI: 03:00.0, bad id 0xffffffff
PCI: 03:01.0, bad id 0xffffffff
PCI: 03:02.0, bad id 0xffffffff
PCI: 03:03.0, bad id 0xffffffff
PCI: 03:04.0, bad id 0xffffffff
PCI: 03:05.0, bad id 0xffffffff
PCI: 03:06.0, bad id 0xffffffff
PCI: 03:07.0, bad id 0xffffffff
PCI: 03:08.0, bad id 0xffffffff
PCI: 03:09.0, bad id 0xffffffff
PCI: 03:0a.0, bad id 0xffffffff
PCI: 03:0b.0, bad id 0xffffffff
PCI: 03:0c.0, bad id 0xffffffff
PCI: 03:0d.0, bad id 0xffffffff
PCI: 03:0e.0, bad id 0xffffffff
PCI: 03:0f.0, bad id 0xffffffff
PCI: 03:10.0, bad id 0xffffffff
PCI: 03:11.0, bad id 0xffffffff
PCI: 03:12.0, bad id 0xffffffff
PCI: 03:13.0, bad id 0xffffffff
PCI: 03:14.0, bad id 0xffffffff
PCI: 03:15.0, bad id 0xffffffff
PCI: 03:16.0, bad id 0xffffffff
PCI: 03:17.0, bad id 0xffffffff
PCI: 03:18.0, bad id 0xffffffff
PCI: 03:19.0, bad id 0xffffffff
PCI: 03:1a.0, bad id 0xffffffff
PCI: 03:1b.0, bad id 0xffffffff
PCI: 03:1c.0, bad id 0xffffffff
PCI: 03:1d.0, bad id 0xffffffff
PCI: 03:1e.0, bad id 0xffffffff
PCI: 03:1f.0, bad id 0xffffffff
PCI: pci_scan_bus returning with max=003
Capability: type 0x07 @ 0xa0
PCI: 03: 133MHz PCI-X
do_pci_scan_bridge returns max 3
do_pci_scan_bridge for PCI: 01:03.0
PCI: pci_scan_bus for bus 04
PCI: 04:00.0 [1022/7464] bus ops
PCI: 04:00.0 [1022/7464] enabled
PCI: 04:00.1 [1022/7464] bus ops
PCI: 04:00.1 [1022/7464] enabled
PCI: 04:00.3, bad id 0xffffffff
PCI: 04:00.4, bad id 0xffffffff
PCI: 04:00.5, bad id 0xffffffff
PCI: 04:00.6, bad id 0xffffffff
PCI: 04:00.7, bad id 0xffffffff
PCI: 04:01.1, bad id 0xffffffff
PCI: 04:01.2, bad id 0xffffffff
PCI: 04:01.3, bad id 0xffffffff
PCI: 04:01.4, bad id 0xffffffff
PCI: 04:01.5, bad id 0xffffffff
PCI: 04:01.6, bad id 0xffffffff
PCI: 04:01.7, bad id 0xffffffff
PCI: 04:02.0, bad id 0xffffffff
PCI: 04:03.0, bad id 0xffffffff
PCI: 04:04.0, bad id 0xffffffff
PCI: 04:05.0, bad id 0xffffffff
PCI: 04:06.0 [1002/4752] enabled
PCI: 04:07.0, bad id 0xffffffff
PCI: 04:08.0, bad id 0xffffffff
PCI: 04:09.0, bad id 0xffffffff
PCI: 04:0a.0, bad id 0xffffffff
PCI: 04:0b.0, bad id 0xffffffff
PCI: 04:0c.0, bad id 0xffffffff
PCI: 04:0d.0, bad id 0xffffffff
PCI: 04:0e.0, bad id 0xffffffff
PCI: 04:0f.0, bad id 0xffffffff
PCI: 04:10.0, bad id 0xffffffff
PCI: 04:11.0, bad id 0xffffffff
PCI: 04:12.0, bad id 0xffffffff
PCI: 04:13.0, bad id 0xffffffff
PCI: 04:14.0, bad id 0xffffffff
PCI: 04:15.0, bad id 0xffffffff
PCI: 04:16.0, bad id 0xffffffff
PCI: 04:17.0, bad id 0xffffffff
PCI: 04:18.0, bad id 0xffffffff
PCI: 04:19.0, bad id 0xffffffff
PCI: 04:1a.0, bad id 0xffffffff
PCI: 04:1b.0, bad id 0xffffffff
PCI: 04:1c.0, bad id 0xffffffff
PCI: 04:1d.0, bad id 0xffffffff
PCI: 04:1e.0, bad id 0xffffffff
PCI: 04:1f.0, bad id 0xffffffff
scan_static_bus for PCI: 04:00.0
scan_static_bus for PCI: 04:00.0 done
scan_static_bus for PCI: 04:00.1
scan_static_bus for PCI: 04:00.1 done
PCI: pci_scan_bus returning with max=004
do_pci_scan_bridge returns max 4
scan_static_bus for PCI: 01:04.0
PNP: 002e.0 disabled
PNP: 002e.1 disabled
PNP: 002e.2 disabled
PNP: 002e.3 enabled
PNP: 002e.4 disabled
PNP: 002e.5 disabled
PNP: 002e.6 enabled
PNP: 002e.7 disabled
PNP: 002e.8 disabled
PNP: 002e.9 disabled
PNP: 002e.a disabled
scan_static_bus for PCI: 01:04.0 done
scan_static_bus for PCI: 01:04.2
scan_static_bus for PCI: 01:04.2 done
scan_static_bus for PCI: 01:04.3
smbus: PCI: 01:04.3[0]->I2C: 01:70 enabled
smbus: PCI: 01:04.3[0]->I2C: 01:50 enabled
smbus: PCI: 01:04.3[0]->I2C: 01:51 enabled
smbus: PCI: 01:04.3[0]->I2C: 01:52 enabled
smbus: PCI: 01:04.3[0]->I2C: 01:53 enabled
smbus: PCI: 01:04.3[0]->I2C: 01:54 enabled
smbus: PCI: 01:04.3[0]->I2C: 01:55 enabled
smbus: PCI: 01:04.3[0]->I2C: 01:56 enabled
smbus: PCI: 01:04.3[0]->I2C: 01:57 enabled
scan_static_bus for PCI: 01:04.3 done
PCI: pci_scan_bus returning with max=004
PCI: pci_scan_bus returning with max=004
PCI_DOMAIN: 0000 passpw: enabled
PCI_DOMAIN: 0000 passpw: enabled
scan_static_bus for Root Device done
done
Setting up VGA for PCI: 04:06.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 01:03.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:18.0
Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
APIC_CLUSTER: 0 read_resources bus 0 link: 0
APIC: 00 missing read_resources
APIC: 01 missing read_resources
APIC_CLUSTER: 0 read_resources bus 0 link: 0 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0
VGA: PCI: 00:18.0 (aka node 0) link 0 has VGA device
PCI: 00:18.0 read_resources bus 1 link: 0
PCI: 01:01.0 read_resources bus 2 link: 0
PCI: 01:01.0 read_resources bus 2 link: 0 done
PCI: 01:03.0 read_resources bus 4 link: 0
PCI: 01:03.0 read_resources bus 4 link: 0 done
PCI: 01:04.0 read_resources bus 0 link: 0
PCI: 01:04.0 read_resources bus 0 link: 0 done
PCI: 01:04.3 read_resources bus 1 link: 0
I2C: 01:70 missing read_resources
I2C: 01:50 missing read_resources
I2C: 01:51 missing read_resources
I2C: 01:52 missing read_resources
I2C: 01:53 missing read_resources
I2C: 01:54 missing read_resources
I2C: 01:55 missing read_resources
I2C: 01:56 missing read_resources
I2C: 01:57 missing read_resources
PCI: 01:04.3 read_resources bus 1 link: 0 done
PCI: 00:18.0 read_resources bus 1 link: 0 done
PCI: 00:18.0 read_resources bus 0 link: 1
PCI: 00:18.0 read_resources bus 0 link: 1 done
PCI: 00:18.0 read_resources bus 0 link: 2
PCI: 00:18.0 read_resources bus 0 link: 2 done
PCI: 00:19.0 read_resources bus 0 link: 0
PCI: 00:19.0 read_resources bus 0 link: 0 done
PCI: 00:19.0 read_resources bus 0 link: 1
PCI: 00:19.0 read_resources bus 0 link: 1 done
PCI: 00:19.0 read_resources bus 0 link: 2
PCI: 00:19.0 read_resources bus 0 link: 2 done
PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
Root Device links 1 child on link 0 Root Device
APIC_CLUSTER: 0 links 1 child on link 0 APIC_CLUSTER: 0
APIC: 00 links 0 child on link 0 NULL
APIC: 01 links 0 child on link 0 NULL
PCI_DOMAIN: 0000 links 1 child on link 0 PCI_DOMAIN: 0000
PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
PCI: 00:18.0 links 3 child on link 0 PCI: 00:18.0
PCI: 00:18.0 resource base fc0003 size 0 align 0 gran 0 limit ffff00 flags 1 index 1b8
PCI: 00:18.0 resource base 3 size 0 align 0 gran 0 limit 1fff000 flags 1 index 1c0
PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 0
PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 2
PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80200 index 1
PCI: 00:18.0 resource base a0000 size 20000 align 0 gran 0 limit ffffffff flags c0000200 index 4
PCI: 01:01.0 links 1 child on link 0 PCI: 01:01.0
PCI: 01:01.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c
PCI: 01:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
PCI: 01:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 02:03.0 links 0 child on link 0 NULL
PCI: 02:03.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
PCI: 02:03.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
PCI: 02:04.0 links 0 child on link 0 NULL
PCI: 02:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
PCI: 02:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
PCI: 01:01.1 links 0 child on link 0 NULL
PCI: 01:01.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
PCI: 01:02.0 links 1 child on link 0 NULL
PCI: 01:02.1 links 0 child on link 0 NULL
PCI: 01:02.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
PCI: 01:03.0 links 1 child on link 0 PCI: 01:03.0
PCI: 01:03.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
PCI: 01:03.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
PCI: 01:03.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
PCI: 04:00.0 links 0 child on link 0 NULL
PCI: 04:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 04:00.1 links 0 child on link 0 NULL
PCI: 04:00.1 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
PCI: 04:00.2 links 0 child on link 0 NULL
PCI: 04:01.0 links 0 child on link 0 NULL
PCI: 04:06.0 links 0 child on link 0 NULL
PCI: 04:06.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffff flags 200 index 10
PCI: 04:06.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14
PCI: 04:06.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
PCI: 04:06.0 resource base fff80000 size 100 align 17 gran 17 limit ffffffff flags c0002200 index 30
PCI: 01:04.0 links 1 child on link 0 PCI: 01:04.0
PCI: 01:04.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 01:04.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 01:04.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PNP: 002e.0 links 0 child on link 0 NULL
PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
PNP: 002e.1 links 0 child on link 0 NULL
PNP: 002e.1 resource base 378 size 400 align 10 gran 10 limit 7ff flags c0000100 index 60
PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2 links 0 child on link 0 NULL
PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75
PNP: 002e.3 links 0 child on link 0 NULL
PNP: 002e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.4 links 0 child on link 0 NULL
PNP: 002e.4 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 60
PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.5 links 0 child on link 0 NULL
PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.6 links 0 child on link 0 NULL
PNP: 002e.6 resource base 60 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.6 resource base 64 size 8 align 3 gran 3 limit 7ff flags c0000100 index 62
PNP: 002e.6 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.7 links 0 child on link 0 NULL
PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 60
PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.8 links 0 child on link 0 NULL
PNP: 002e.8 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 60
PNP: 002e.8 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.9 links 0 child on link 0 NULL
PNP: 002e.9 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 60
PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.a links 0 child on link 0 NULL
PNP: 002e.a resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 60
PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PCI: 01:04.1 links 0 child on link 0 NULL
PCI: 01:04.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
PCI: 01:04.2 links 0 child on link 0 NULL
PCI: 01:04.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 10
PCI: 01:04.3 links 1 child on link 0 PCI: 01:04.3
PCI: 01:04.3 resource base 0 size 100 align 8 gran 8 limit 10000 flags 100 index 58
I2C: 01:70 links 4 child on link 0 I2C: 01:70
I2C: 00:2c links 0 child on link 0 NULL
I2C: 01:50 links 0 child on link 0 NULL
I2C: 01:51 links 0 child on link 0 NULL
I2C: 01:52 links 0 child on link 0 NULL
I2C: 01:53 links 0 child on link 0 NULL
I2C: 01:54 links 0 child on link 0 NULL
I2C: 01:55 links 0 child on link 0 NULL
I2C: 01:56 links 0 child on link 0 NULL
I2C: 01:57 links 0 child on link 0 NULL
PCI: 01:04.5 links 0 child on link 0 NULL
PCI: 01:04.6 links 0 child on link 0 NULL
PCI: 01:04.6 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
PCI: 01:04.6 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 14
PCI: 00:18.1 links 0 child on link 0 NULL
PCI: 00:18.2 links 0 child on link 0 NULL
PCI: 00:18.3 links 0 child on link 0 NULL
PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94
PCI: 00:19.0 links 3 child on link 0 NULL
PCI: 00:19.1 links 0 child on link 0 NULL
PCI: 00:19.2 links 0 child on link 0 NULL
PCI: 00:19.3 links 0 child on link 0 NULL
PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 01:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff
PCI: 01:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done
PCI: 01:03.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 04:06.0 14 * [0x0 - 0xff] io
PCI: 01:03.0 compute_resources_io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done
PCI: 01:03.0 1c * [0x0 - 0xfff] io
PCI: 01:04.3 58 * [0x1000 - 0x10ff] io
PCI: 01:04.6 10 * [0x1400 - 0x14ff] io
PCI: 01:04.6 14 * [0x1800 - 0x187f] io
PCI: 01:04.2 10 * [0x1880 - 0x189f] io
PCI: 01:04.1 20 * [0x18a0 - 0x18af] io
PCI: 00:18.0 compute_resources_io: base: 18b0 size: 2000 align: 12 gran: 12 limit: ffff done
PCI: 00:18.0 00 * [0x0 - 0x1fff] io
PCI_DOMAIN: 0000 compute_resources_io: base: 2000 size: 2000 align: 12 gran: 0 limit: ffff done
PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
PCI: 01:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 01:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 01:03.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:03.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff done
PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 01:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:03.0 10 * [0x0 - 0xffff] mem
PCI: 02:03.0 30 * [0x10000 - 0x1ffff] mem
PCI: 02:04.0 10 * [0x20000 - 0x2ffff] mem
PCI: 02:04.0 30 * [0x30000 - 0x3ffff] mem
PCI: 01:01.0 compute_resources_mem: base: 40000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 01:03.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 04:06.0 10 * [0x0 - 0xffffff] mem
PCI: 04:00.0 10 * [0x1000000 - 0x1000fff] mem
PCI: 04:00.1 10 * [0x1001000 - 0x1001fff] mem
PCI: 04:06.0 18 * [0x1002000 - 0x1002fff] mem
PCI: 01:03.0 compute_resources_mem: base: 1003000 size: 1100000 align: 24 gran: 20 limit: ffffffff done
PCI: 01:03.0 20 * [0x0 - 0x10fffff] mem
PCI: 01:01.0 20 * [0x1100000 - 0x11fffff] mem
PCI: 01:01.1 10 * [0x1200000 - 0x1200fff] mem
PCI: 01:02.1 10 * [0x1201000 - 0x1201fff] mem
PCI: 00:18.0 compute_resources_mem: base: 1202000 size: 1300000 align: 24 gran: 20 limit: ffffffff done
PCI: 00:18.3 94 * [0x0 - 0x3ffffff] mem
PCI: 00:18.0 01 * [0x4000000 - 0x52fffff] mem
PCI_DOMAIN: 0000 compute_resources_mem: base: 5300000 size: 5300000 align: 26 gran: 0 limit: ffffffff done
avoid_fixed_resources: PCI_DOMAIN: 0000
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI_DOMAIN: 0000
constrain_resources: PCI: 00:18.0
constrain_resources: PCI: 01:01.0
constrain_resources: PCI: 02:03.0
constrain_resources: PCI: 02:04.0
constrain_resources: PCI: 01:01.1
constrain_resources: PCI: 01:02.1
constrain_resources: PCI: 01:03.0
constrain_resources: PCI: 04:00.0
constrain_resources: PCI: 04:00.1
constrain_resources: PCI: 04:06.0
constrain_resources: PCI: 01:04.0
constrain_resources: PNP: 002e.3
constrain_resources: PNP: 002e.6
constrain_resources: PCI: 01:04.1
constrain_resources: PCI: 01:04.2
constrain_resources: PCI: 01:04.3
constrain_resources: I2C: 01:70
constrain_resources: I2C: 00:2c
constrain_resources: I2C: 01:50
constrain_resources: I2C: 01:51
constrain_resources: I2C: 01:52
constrain_resources: I2C: 01:53
constrain_resources: I2C: 01:54
constrain_resources: I2C: 01:55
constrain_resources: I2C: 01:56
constrain_resources: I2C: 01:57
constrain_resources: PCI: 01:04.6
constrain_resources: PCI: 00:18.1
constrain_resources: PCI: 00:18.2
constrain_resources: PCI: 00:18.3
constrain_resources: PCI: 00:19.0
constrain_resources: PCI: 00:19.1
constrain_resources: PCI: 00:19.2
constrain_resources: PCI: 00:19.3
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000000 limit 0000ffff
lim->base 00001000 lim->limit 0000ffff
avoid_fixed_resources2: PCI_DOMAIN: 0000 at 10000100 limit ffffffff
lim->base 000c0000 lim->limit febfffff
Setting resources...
PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:2000 align:12 gran:0 limit:ffff
Assigned: PCI: 00:18.0 00 * [0x1000 - 0x2fff] io
PCI_DOMAIN: 0000 allocate_resources_io: next_base: 3000 size: 2000 align: 12 gran: 0 done
PCI: 00:18.0 allocate_resources_io: base:1000 size:2000 align:12 gran:12 limit:ffff
Assigned: PCI: 01:03.0 1c * [0x1000 - 0x1fff] io
Assigned: PCI: 01:04.3 58 * [0x2000 - 0x20ff] io
Assigned: PCI: 01:04.6 10 * [0x2400 - 0x24ff] io
Assigned: PCI: 01:04.6 14 * [0x2800 - 0x287f] io
Assigned: PCI: 01:04.2 10 * [0x2880 - 0x289f] io
Assigned: PCI: 01:04.1 20 * [0x28a0 - 0x28af] io
PCI: 00:18.0 allocate_resources_io: next_base: 28b0 size: 2000 align: 12 gran: 12 done
PCI: 01:01.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
PCI: 01:01.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
PCI: 01:03.0 allocate_resources_io: base:1000 size:1000 align:12 gran:12 limit:ffff
Assigned: PCI: 04:06.0 14 * [0x1000 - 0x10ff] io
PCI: 01:03.0 allocate_resources_io: next_base: 1100 size: 1000 align: 12 gran: 12 done
PCI_DOMAIN: 0000 allocate_resources_mem: base:f8000000 size:5300000 align:26 gran:0 limit:febfffff
Assigned: PCI: 00:18.3 94 * [0xf8000000 - 0xfbffffff] mem
Assigned: PCI: 00:18.0 01 * [0xfc000000 - 0xfd2fffff] mem
PCI_DOMAIN: 0000 allocate_resources_mem: next_base: fd300000 size: 5300000 align: 26 gran: 0 done
PCI: 00:18.0 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 00:18.0 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 01:01.0 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 01:01.0 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 01:03.0 allocate_resources_prefmem: base:febfffff size:0 align:20 gran:20 limit:febfffff
PCI: 01:03.0 allocate_resources_prefmem: next_base: febfffff size: 0 align: 20 gran: 20 done
PCI: 00:18.0 allocate_resources_mem: base:fc000000 size:1300000 align:24 gran:20 limit:febfffff
Assigned: PCI: 01:03.0 20 * [0xfc000000 - 0xfd0fffff] mem
Assigned: PCI: 01:01.0 20 * [0xfd100000 - 0xfd1fffff] mem
Assigned: PCI: 01:01.1 10 * [0xfd200000 - 0xfd200fff] mem
Assigned: PCI: 01:02.1 10 * [0xfd201000 - 0xfd201fff] mem
PCI: 00:18.0 allocate_resources_mem: next_base: fd202000 size: 1300000 align: 24 gran: 20 done
PCI: 01:01.0 allocate_resources_mem: base:fd100000 size:100000 align:20 gran:20 limit:febfffff
Assigned: PCI: 02:03.0 10 * [0xfd100000 - 0xfd10ffff] mem
Assigned: PCI: 02:03.0 30 * [0xfd110000 - 0xfd11ffff] mem
Assigned: PCI: 02:04.0 10 * [0xfd120000 - 0xfd12ffff] mem
Assigned: PCI: 02:04.0 30 * [0xfd130000 - 0xfd13ffff] mem
PCI: 01:01.0 allocate_resources_mem: next_base: fd140000 size: 100000 align: 20 gran: 20 done
PCI: 01:03.0 allocate_resources_mem: base:fc000000 size:1100000 align:24 gran:20 limit:febfffff
Assigned: PCI: 04:06.0 10 * [0xfc000000 - 0xfcffffff] mem
Assigned: PCI: 04:00.0 10 * [0xfd000000 - 0xfd000fff] mem
Assigned: PCI: 04:00.1 10 * [0xfd001000 - 0xfd001fff] mem
Assigned: PCI: 04:06.0 18 * [0xfd002000 - 0xfd002fff] mem
PCI: 01:03.0 allocate_resources_mem: next_base: fd003000 size: 1100000 align: 24 gran: 20 done
Root Device assign_resources, bus 0 link: 0
0: mmio_basek=003e0000, basek=00000300, limitk=00100000
1: mmio_basek=003e0000, basek=00100000, limitk=00200000
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
amdk8_set_resource, enabling legacy VGA IO forwarding for PCI: 00:18.0 link 0x0
PCI: 00:18.0 1c0 <- [0x0000001000 - 0x0000002fff] size 0x00002000 gran 0x0c io <node 0 link 0>
PCI: 00:18.0 1b8 <- [0x00fc000000 - 0x00fd2fffff] size 0x01300000 gran 0x14 mem <node 0 link 0>
PCI: 00:18.0 1b0 <- [0x00000a0000 - 0x00000bffff] size 0x00020000 gran 0x00 mem <node 0 link 0>
PCI: 00:18.0 assign_resources, bus 1 link: 0
PCI: 01:01.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io
PCI: 01:01.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 01:01.0 20 <- [0x00fd100000 - 0x00fd1fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 01:01.0 assign_resources, bus 2 link: 0
PCI: 02:03.0 10 <- [0x00fd100000 - 0x00fd10ffff] size 0x00010000 gran 0x10 mem64first try
Second write regval fd100004 base_lo fd100000
Second failure regval fd100004 base_lo fd100000
PCI: 02:03.0 10 <- [0x00fd100000 - 0x00fd10ffff] size 0x00010000 gran 0x10 mem64
PCI: 02:03.0 30 <- [0x00fd110000 - 0x00fd11ffff] size 0x00010000 gran 0x10 romem
PCI: 02:04.0 10 <- [0x00fd120000 - 0x00fd12ffff] size 0x00010000 gran 0x10 mem64first try
Second write regval fd120004 base_lo fd120000
Second failure regval fd120004 base_lo fd120000
PCI: 02:04.0 10 <- [0x00fd120000 - 0x00fd12ffff] size 0x00010000 gran 0x10 mem64
PCI: 02:04.0 30 <- [0x00fd130000 - 0x00fd13ffff] size 0x00010000 gran 0x10 romem
PCI: 01:01.0 assign_resources, bus 2 link: 0
PCI: 01:01.1 10 <- [0x00fd200000 - 0x00fd200fff] size 0x00001000 gran 0x0c mem64first try
Second write regval fd200004 base_lo fd200000
Second failure regval fd200004 base_lo fd200000
PCI: 01:01.1 10 <- [0x00fd200000 - 0x00fd200fff] size 0x00001000 gran 0x0c mem64
PCI: 01:02.1 10 <- [0x00fd201000 - 0x00fd201fff] size 0x00001000 gran 0x0c mem64first try
Second write regval fd201004 base_lo fd201000
Second failure regval fd201004 base_lo fd201000
PCI: 01:02.1 10 <- [0x00fd201000 - 0x00fd201fff] size 0x00001000 gran 0x0c mem64
PCI: 01:03.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000 gran 0x0c bus 04 io
PCI: 01:03.0 24 <- [0x00febfffff - 0x00febffffe] size 0x00000000 gran 0x14 bus 04 prefmem
PCI: 01:03.0 20 <- [0x00fc000000 - 0x00fd0fffff] size 0x01100000 gran 0x14 bus 04 mem
PCI: 01:03.0 assign_resources, bus 4 link: 0
PCI: 04:00.0 10 <- [0x00fd000000 - 0x00fd000fff] size 0x00001000 gran 0x0c mem
PCI: 04:00.1 10 <- [0x00fd001000 - 0x00fd001fff] size 0x00001000 gran 0x0c mem
PCI: 04:06.0 10 <- [0x00fc000000 - 0x00fcffffff] size 0x01000000 gran 0x18 mem
PCI: 04:06.0 14 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
PCI: 04:06.0 18 <- [0x00fd002000 - 0x00fd002fff] size 0x00001000 gran 0x0c mem
PCI: 01:03.0 assign_resources, bus 4 link: 0
PCI: 01:04.0 assign_resources, bus 0 link: 0
PNP: 002e.3 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
PNP: 002e.3 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
PNP: 002e.6 60 <- [0x0000000060 - 0x0000000067] size 0x00000008 gran 0x03 io
PNP: 002e.6 62 <- [0x0000000064 - 0x000000006b] size 0x00000008 gran 0x03 io
PNP: 002e.6 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
PCI: 01:04.0 assign_resources, bus 0 link: 0
PCI: 01:04.1 20 <- [0x00000028a0 - 0x00000028af] size 0x00000010 gran 0x04 io
PCI: 01:04.2 10 <- [0x0000002880 - 0x000000289f] size 0x00000020 gran 0x05 io
PCI: 01:04.3 58 <- [0x0000002000 - 0x00000020ff] size 0x00000100 gran 0x08 io
PCI: 01:04.3 assign_resources, bus 1 link: 0
PCI: 01:04.3 assign_resources, bus 1 link: 0
PCI: 01:04.6 10 <- [0x0000002400 - 0x00000024ff] size 0x00000100 gran 0x08 io
PCI: 01:04.6 14 <- [0x0000002800 - 0x000000287f] size 0x00000080 gran 0x07 io
PCI: 00:18.0 assign_resources, bus 1 link: 0
PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a mem <gart>
PCI: 00:19.3 94 <- [0x00f8000000 - 0x00fbffffff] size 0x04000000 gran 0x1a mem <gart>
PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
Root Device links 1 child on link 0 Root Device
APIC_CLUSTER: 0 links 1 child on link 0 APIC_CLUSTER: 0
APIC: 00 links 0 child on link 0 NULL
APIC: 01 links 0 child on link 0 NULL
PCI_DOMAIN: 0000 links 1 child on link 0 PCI_DOMAIN: 0000
PCI_DOMAIN: 0000 resource base 1000 size 2000 align 12 gran 0 limit ffff flags 40040100 index 10000000
PCI_DOMAIN: 0000 resource base f8000000 size 5300000 align 26 gran 0 limit febfffff flags 40040200 index 10000100
PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
PCI_DOMAIN: 0000 resource base c0000 size 3ff40000 align 0 gran 0 limit 0 flags e0004200 index 20
PCI_DOMAIN: 0000 resource base 40000000 size 40000000 align 0 gran 0 limit 0 flags e0004200 index 31
PCI: 00:18.0 links 3 child on link 0 PCI: 00:18.0
PCI: 00:18.0 resource base 1000 size 2000 align 12 gran 12 limit ffff flags 60080100 index 1c0
PCI: 00:18.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 40081200 index 2
PCI: 00:18.0 resource base fc000000 size 1300000 align 24 gran 20 limit febfffff flags 60080200 index 1b8
PCI: 00:18.0 resource base a0000 size 20000 align 0 gran 0 limit ffffffff flags e0000200 index 1b0
PCI: 01:01.0 links 1 child on link 0 PCI: 01:01.0
PCI: 01:01.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
PCI: 01:01.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
PCI: 01:01.0 resource base fd100000 size 100000 align 20 gran 20 limit febfffff flags 60080202 index 20
PCI: 02:03.0 links 0 child on link 0 NULL
PCI: 02:03.0 resource base fd100000 size 10000 align 16 gran 16 limit febfffff flags 60000201 index 10
PCI: 02:03.0 resource base fd110000 size 10000 align 16 gran 16 limit febfffff flags 60002200 index 30
PCI: 02:04.0 links 0 child on link 0 NULL
PCI: 02:04.0 resource base fd120000 size 10000 align 16 gran 16 limit febfffff flags 60000201 index 10
PCI: 02:04.0 resource base fd130000 size 10000 align 16 gran 16 limit febfffff flags 60002200 index 30
PCI: 01:01.1 links 0 child on link 0 NULL
PCI: 01:01.1 resource base fd200000 size 1000 align 12 gran 12 limit febfffff flags 60000201 index 10
PCI: 01:02.0 links 1 child on link 0 NULL
PCI: 01:02.1 links 0 child on link 0 NULL
PCI: 01:02.1 resource base fd201000 size 1000 align 12 gran 12 limit febfffff flags 60000201 index 10
PCI: 01:03.0 links 1 child on link 0 PCI: 01:03.0
PCI: 01:03.0 resource base 1000 size 1000 align 12 gran 12 limit ffff flags 60080102 index 1c
PCI: 01:03.0 resource base febfffff size 0 align 20 gran 20 limit febfffff flags 60081202 index 24
PCI: 01:03.0 resource base fc000000 size 1100000 align 24 gran 20 limit febfffff flags 60080202 index 20
PCI: 04:00.0 links 0 child on link 0 NULL
PCI: 04:00.0 resource base fd000000 size 1000 align 12 gran 12 limit febfffff flags 60000200 index 10
PCI: 04:00.1 links 0 child on link 0 NULL
PCI: 04:00.1 resource base fd001000 size 1000 align 12 gran 12 limit febfffff flags 60000200 index 10
PCI: 04:00.2 links 0 child on link 0 NULL
PCI: 04:01.0 links 0 child on link 0 NULL
PCI: 04:06.0 links 0 child on link 0 NULL
PCI: 04:06.0 resource base fc000000 size 1000000 align 24 gran 24 limit febfffff flags 60000200 index 10
PCI: 04:06.0 resource base 1000 size 100 align 8 gran 8 limit ffff flags 60000100 index 14
PCI: 04:06.0 resource base fd002000 size 1000 align 12 gran 12 limit febfffff flags 60000200 index 18
PCI: 04:06.0 resource base fff80000 size 100 align 17 gran 17 limit ffffffff flags c0002200 index 30
PCI: 01:04.0 links 1 child on link 0 PCI: 01:04.0
PCI: 01:04.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
PCI: 01:04.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100
PCI: 01:04.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
PNP: 002e.0 links 0 child on link 0 NULL
PNP: 002e.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
PNP: 002e.1 links 0 child on link 0 NULL
PNP: 002e.1 resource base 378 size 400 align 10 gran 10 limit 7ff flags c0000100 index 60
PNP: 002e.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2 links 0 child on link 0 NULL
PNP: 002e.2 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
PNP: 002e.2 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
PNP: 002e.2 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 75
PNP: 002e.3 links 0 child on link 0 NULL
PNP: 002e.3 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.3 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.4 links 0 child on link 0 NULL
PNP: 002e.4 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 60
PNP: 002e.4 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.5 links 0 child on link 0 NULL
PNP: 002e.5 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.6 links 0 child on link 0 NULL
PNP: 002e.6 resource base 60 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
PNP: 002e.6 resource base 64 size 8 align 3 gran 3 limit 7ff flags e0000100 index 62
PNP: 002e.6 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
PNP: 002e.7 links 0 child on link 0 NULL
PNP: 002e.7 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 60
PNP: 002e.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.8 links 0 child on link 0 NULL
PNP: 002e.8 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 60
PNP: 002e.8 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.9 links 0 child on link 0 NULL
PNP: 002e.9 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 60
PNP: 002e.9 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PNP: 002e.a links 0 child on link 0 NULL
PNP: 002e.a resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 60
PNP: 002e.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
PCI: 01:04.1 links 0 child on link 0 NULL
PCI: 01:04.1 resource base 28a0 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
PCI: 01:04.2 links 0 child on link 0 NULL
PCI: 01:04.2 resource base 2880 size 20 align 5 gran 5 limit ffff flags 60000100 index 10
PCI: 01:04.3 links 1 child on link 0 PCI: 01:04.3
PCI: 01:04.3 resource base 2000 size 100 align 8 gran 8 limit ffff flags 60000100 index 58
I2C: 01:70 links 4 child on link 0 I2C: 01:70
I2C: 00:2c links 0 child on link 0 NULL
I2C: 01:50 links 0 child on link 0 NULL
I2C: 01:51 links 0 child on link 0 NULL
I2C: 01:52 links 0 child on link 0 NULL
I2C: 01:53 links 0 child on link 0 NULL
I2C: 01:54 links 0 child on link 0 NULL
I2C: 01:55 links 0 child on link 0 NULL
I2C: 01:56 links 0 child on link 0 NULL
I2C: 01:57 links 0 child on link 0 NULL
PCI: 01:04.5 links 0 child on link 0 NULL
PCI: 01:04.6 links 0 child on link 0 NULL
PCI: 01:04.6 resource base 2400 size 100 align 8 gran 8 limit ffff flags 60000100 index 10
PCI: 01:04.6 resource base 2800 size 80 align 7 gran 7 limit ffff flags 60000100 index 14
PCI: 00:18.1 links 0 child on link 0 NULL
PCI: 00:18.2 links 0 child on link 0 NULL
PCI: 00:18.3 links 0 child on link 0 NULL
PCI: 00:18.3 resource base f8000000 size 4000000 align 26 gran 26 limit febfffff flags 60000200 index 94
PCI: 00:19.0 links 3 child on link 0 NULL
PCI: 00:19.1 links 0 child on link 0 NULL
PCI: 00:19.2 links 0 child on link 0 NULL
PCI: 00:19.3 links 0 child on link 0 NULL
Done allocating resources.
Enabling resources...
PCI: 00:18.0 cmd <- 00
PCI: 01:01.0 bridge ctrl <- 0003
PCI: 01:01.0 cmd <- 06
PCI: 02:03.0 cmd <- 02
PCI: 02:04.0 cmd <- 02
PCI: 01:01.1 subsystem <- 161f/3016
PCI: 01:01.1 cmd <- 06
PCI: 01:02.1 subsystem <- 161f/3016
PCI: 01:02.1 cmd <- 06
PCI: 01:03.0 bridge ctrl <- 000b
PCI: 01:03.0 cmd <- 07
PCI: 04:00.0 subsystem <- 161f/3016
PCI: 04:00.0 cmd <- 02
PCI: 04:00.1 subsystem <- 161f/3016
PCI: 04:00.1 cmd <- 02
PCI: 04:06.0 subsystem <- 161f/3016
PCI: 04:06.0 cmd <- 83
PCI: 01:04.0 subsystem <- 161f/3016
PCI: 01:04.0 cmd <- 0f
PCI: 01:04.1 subsystem <- 161f/3016
PCI: 01:04.1 cmd <- 01
PCI: 01:04.2 subsystem <- 161f/3016
PCI: 01:04.2 cmd <- 01
PCI: 01:04.3 subsystem <- 161f/3016
PCI: 01:04.3 cmd <- 01
PCI: 01:04.6 subsystem <- 161f/3016
PCI: 01:04.6 cmd <- 01
PCI: 00:18.1 subsystem <- 161f/3016
PCI: 00:18.1 cmd <- 00
PCI: 00:18.2 subsystem <- 161f/3016
PCI: 00:18.2 cmd <- 00
PCI: 00:18.3 cmd <- 00
PCI: 00:19.0 cmd <- 00
PCI: 00:19.1 subsystem <- 161f/3016
PCI: 00:19.1 cmd <- 00
PCI: 00:19.2 subsystem <- 161f/3016
PCI: 00:19.2 cmd <- 00
PCI: 00:19.3 cmd <- 00
done.
Initializing devices...
Root Device init
APIC_CLUSTER: 0 init
start_eip=0x0000b000, offset=0x00100000, code_size=0x0000005b
Initializing CPU #0
CPU: vendor AMD device f51
CPU: family 0f, model 05, stepping 01
Enabling cache
Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
ADDRESS_MASK_HIGH=0xff
Zero-sized MTRR range @0KB
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
CPU model AMD Opteron(tm) Processor 244
Setting up local apic... apic_id: 0x00 done.
Clearing memory 2048K - 1048576K: --------------- done
CPU #0 initialized
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+Sending STARTUP #2 to 1.
After apic_write.
Startup point 1.
Waiting for send to finish...
+After Startup.
Initializing CPU #1
Waiting for 1 CPUS to stop
CPU: vendor AMD device f51
CPU: family 0f, model 05, stepping 01
Enabling cache
Setting fixed MTRRs(0-88) type: UC
Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
DONE fixed MTRRs
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
ADDRESS_MASK_HIGH=0xff
Zero-sized MTRR range @0KB
DONE variable MTRRs
Clear out the extra MTRR's
call enable_var_mtrr()
Leave x86_setup_var_mtrrs
MTRR check
Fixed MTRRs : Enabled
Variable MTRRs: Enabled
CPU model AMD Opteron(tm) Processor 244
Setting up local apic... apic_id: 0x01 done.
Clearing memory 1048576K - 2097152K: ---------------- done
CPU #1 initialized
All AP CPUs stopped
PCI: 00:18.0 init
PCI: 01:01.0 init
PCI: 01:03.0 init
PCI: 04:06.0 init
PCI: 01:04.0 init
amd8111: ioapic bsp_apicid = 00
for IRQ, reg 0x00000000 value 0x00000700 0x00000000
for IRQ, reg 0x00000001 value 0x00010000 0x00000000
for IRQ, reg 0x00000002 value 0x00010000 0x00000000
for IRQ, reg 0x00000003 value 0x00010000 0x00000000
for IRQ, reg 0x00000004 value 0x00010000 0x00000000
for IRQ, reg 0x00000005 value 0x00010000 0x00000000
for IRQ, reg 0x00000006 value 0x00010000 0x00000000
for IRQ, reg 0x00000007 value 0x00010000 0x00000000
for IRQ, reg 0x00000008 value 0x00010000 0x00000000
for IRQ, reg 0x00000009 value 0x00010000 0x00000000
for IRQ, reg 0x0000000a value 0x00010000 0x00000000
for IRQ, reg 0x0000000b value 0x00010000 0x00000000
for IRQ, reg 0x0000000c value 0x00010000 0x00000000
for IRQ, reg 0x0000000d value 0x00010000 0x00000000
for IRQ, reg 0x0000000e value 0x00010000 0x00000000
for IRQ, reg 0x0000000f value 0x00010000 0x00000000
for IRQ, reg 0x00000010 value 0x00010000 0x00000000
for IRQ, reg 0x00000011 value 0x00010000 0x00000000
for IRQ, reg 0x00000012 value 0x00010000 0x00000000
for IRQ, reg 0x00000013 value 0x00010000 0x00000000
for IRQ, reg 0x00000014 value 0x00010000 0x00000000
for IRQ, reg 0x00000015 value 0x00010000 0x00000000
for IRQ, reg 0x00000016 value 0x00010000 0x00000000
for IRQ, reg 0x00000017 value 0x00010000 0x00000000
RTC Init
Invalid CMOS LB checksum
enabling HPET @0xfed00000
PNP: 002e.3 init
PNP: 002e.6 init
Keyboard init...
Keyboard selftest failed ACK: 0xfe
PCI: 01:04.1 init
IDE1 IDE0 PCI: 01:04.3 init
set power on after power fail
PCI: 00:18.1 init
Check CBFS header at fffeffe0
magic is 4f524243
Found CBFS header at fffeffe0
Check fallback/coreboot_ram
CBFS: follow chain: fff80000 + 38 + a603 + align -> fff8a640
Check fallback/payload
CBFS: follow chain: fff8a640 + 38 + 8b7d + align -> fff93200
Check pci14e4,16a6.rom
CBFS: follow chain: fff93200 + 38 + 12200 + align -> fffa5440
Check
CBFS: follow chain: fffa5440 + 28 + 4ab78 + align -> ffff0000
CBFS: Could not find file pci1022,1101.rom
In cbfs, rom address for PCI: 00:18.1 = 00000000
On mainboard, rom address for PCI: 00:18.1 = 0
PCI: 00:18.2 init
Check CBFS header at fffeffe0
magic is 4f524243
Found CBFS header at fffeffe0
Check fallback/coreboot_ram
CBFS: follow chain: fff80000 + 38 + a603 + align -> fff8a640
Check fallback/payload
CBFS: follow chain: fff8a640 + 38 + 8b7d + align -> fff93200
Check pci14e4,16a6.rom
CBFS: follow chain: fff93200 + 38 + 12200 + align -> fffa5440
Check
CBFS: follow chain: fffa5440 + 28 + 4ab78 + align -> ffff0000
CBFS: Could not find file pci1022,1102.rom
In cbfs, rom address for PCI: 00:18.2 = 00000000
On mainboard, rom address for PCI: 00:18.2 = 0
PCI: 00:18.3 init
NB: Function 3 Misc Control.. done.
PCI: 00:19.0 init
PCI: 00:19.1 init
Check CBFS header at fffeffe0
magic is 4f524243
Found CBFS header at fffeffe0
Check fallback/coreboot_ram
CBFS: follow chain: fff80000 + 38 + a603 + align -> fff8a640
Check fallback/payload
CBFS: follow chain: fff8a640 + 38 + 8b7d + align -> fff93200
Check pci14e4,16a6.rom
CBFS: follow chain: fff93200 + 38 + 12200 + align -> fffa5440
Check
CBFS: follow chain: fffa5440 + 28 + 4ab78 + align -> ffff0000
CBFS: Could not find file pci1022,1101.rom
In cbfs, rom address for PCI: 00:19.1 = 00000000
On mainboard, rom address for PCI: 00:19.1 = 0
PCI: 00:19.2 init
Check CBFS header at fffeffe0
magic is 4f524243
Found CBFS header at fffeffe0
Check fallback/coreboot_ram
CBFS: follow chain: fff80000 + 38 + a603 + align -> fff8a640
Check fallback/payload
CBFS: follow chain: fff8a640 + 38 + 8b7d + align -> fff93200
Check pci14e4,16a6.rom
CBFS: follow chain: fff93200 + 38 + 12200 + align -> fffa5440
Check
CBFS: follow chain: fffa5440 + 28 + 4ab78 + align -> ffff0000
CBFS: Could not find file pci1022,1102.rom
In cbfs, rom address for PCI: 00:19.2 = 00000000
On mainboard, rom address for PCI: 00:19.2 = 0
PCI: 00:19.3 init
NB: Function 3 Misc Control.. done.
PCI: 02:03.0 init
Check CBFS header at fffeffe0
magic is 4f524243
Found CBFS header at fffeffe0
Check fallback/coreboot_ram
CBFS: follow chain: fff80000 + 38 + a603 + align -> fff8a640
Check fallback/payload
CBFS: follow chain: fff8a640 + 38 + 8b7d + align -> fff93200
Check pci14e4,16a6.rom
CBFS: File pci14e4,16a6.rom is of type 63000000 instead oftype 30
In cbfs, rom address for PCI: 02:03.0 = 00000000
On card, rom address for PCI: 02:03.0 = fd110000
PCI Expansion ROM, signature 0x0000, INIT size 0x0000, data ptr 0x0000
Incorrect Expansion ROM Header Signature 0000
PCI: 02:04.0 init
Check CBFS header at fffeffe0
magic is 4f524243
Found CBFS header at fffeffe0
Check fallback/coreboot_ram
CBFS: follow chain: fff80000 + 38 + a603 + align -> fff8a640
Check fallback/payload
CBFS: follow chain: fff8a640 + 38 + 8b7d + align -> fff93200
Check pci14e4,16a6.rom
CBFS: File pci14e4,16a6.rom is of type 63000000 instead oftype 30
In cbfs, rom address for PCI: 02:04.0 = 00000000
On card, rom address for PCI: 02:04.0 = fd130000
PCI Expansion ROM, signature 0x0000, INIT size 0x0000, data ptr 0x0000
Incorrect Expansion ROM Header Signature 0000
Devices initialized
Show all devs...After init.
Root Device: enabled 1, 0 resources
APIC_CLUSTER: 0: enabled 1, 0 resources
APIC: 00: enabled 1, 0 resources
PCI_DOMAIN: 0000: enabled 1, 5 resources
PCI: 00:18.0: enabled 1, 4 resources
PCI: 01:01.0: enabled 1, 3 resources
PCI: 01:01.1: enabled 1, 1 resources
PCI: 01:02.0: enabled 0, 0 resources
PCI: 01:02.1: enabled 1, 1 resources
PCI: 01:03.0: enabled 1, 3 resources
PCI: 04:00.0: enabled 1, 1 resources
PCI: 04:00.1: enabled 1, 1 resources
PCI: 04:00.2: enabled 0, 0 resources
PCI: 04:01.0: enabled 0, 0 resources
PCI: 04:06.0: enabled 1, 4 resources
PCI: 01:04.0: enabled 1, 3 resources
PNP: 002e.0: enabled 0, 3 resources
PNP: 002e.1: enabled 0, 3 resources
PNP: 002e.2: enabled 0, 4 resources
PNP: 002e.3: enabled 1, 2 resources
PNP: 002e.4: enabled 0, 2 resources
PNP: 002e.5: enabled 0, 1 resources
PNP: 002e.6: enabled 1, 3 resources
PNP: 002e.7: enabled 0, 2 resources
PNP: 002e.8: enabled 0, 2 resources
PNP: 002e.9: enabled 0, 2 resources
PNP: 002e.a: enabled 0, 2 resources
PCI: 01:04.1: enabled 1, 1 resources
PCI: 01:04.2: enabled 1, 1 resources
PCI: 01:04.3: enabled 1, 1 resources
I2C: 01:70: enabled 1, 0 resources
I2C: 00:2c: enabled 1, 0 resources
I2C: 01:50: enabled 1, 0 resources
I2C: 01:51: enabled 1, 0 resources
I2C: 01:52: enabled 1, 0 resources
I2C: 01:53: enabled 1, 0 resources
I2C: 01:54: enabled 1, 0 resources
I2C: 01:55: enabled 1, 0 resources
I2C: 01:56: enabled 1, 0 resources
I2C: 01:57: enabled 1, 0 resources
PCI: 01:04.5: enabled 0, 0 resources
PCI: 01:04.6: enabled 1, 2 resources
PCI: 00:18.1: enabled 1, 0 resources
PCI: 00:18.2: enabled 1, 0 resources
PCI: 00:18.3: enabled 1, 1 resources
PCI: 00:19.0: enabled 1, 0 resources
PCI: 00:19.1: enabled 1, 0 resources
PCI: 00:19.2: enabled 1, 0 resources
PCI: 00:19.3: enabled 1, 0 resources
APIC: 01: enabled 1, 0 resources
PCI: 02:03.0: enabled 1, 2 resources
PCI: 02:04.0: enabled 1, 2 resources
Initializing CBMEM area to 0x3fff0000 (65536 bytes)
Adding CBMEM entry as no. 1
Moving GDT to 3fff0200...ok
High Tables Base is 3fff0000.
Copying Interrupt Routing Table to 0x000f0000... done.
Adding CBMEM entry as no. 2
Copying Interrupt Routing Table to 0x3fff0400... done.
PIRQ table: 176 bytes.
Looking for bad PCIX MHz input
Looking for bad Hot Swap Enable
OK 133MHz & Hot Swap is off
Wrote the mp table end at: 000f0410 - 000f0614
Adding CBMEM entry as no. 3
Looking for bad PCIX MHz input
Looking for bad Hot Swap Enable
OK 133MHz & Hot Swap is off
Wrote the mp table end at: 3fff1410 - 3fff1614
MP table: 532 bytes.
Adding CBMEM entry as no. 4
Writing high table forward entry at 0x00000500
Wrote coreboot table at: 00000500 - 00000518 checksum 9bdf
New low_table_end: 0x00000518
Now going to write high coreboot table at 0x3fff2400
rom_table_end = 0x3fff2400
Adjust low_table_end from 0x00000518 to 0x00001000
Adjust rom_table_end from 0x3fff2400 to 0x40000000
Adding high table area
Wrote coreboot table at: 3fff2400 - 3fff2ca4 checksum 1519
coreboot table: 2212 bytes.
0. FREE SPACE 3fff4400 0000bc00
1. GDT 3fff0200 00000200
2. IRQ TABLE 3fff0400 00001000
3. SMP TABLE 3fff1400 00001000
4. COREBOOT 3fff2400 00002000
Check CBFS header at fffeffe0
magic is 4f524243
Found CBFS header at fffeffe0
Check fallback/coreboot_ram
CBFS: follow chain: fff80000 + 38 + a603 + align -> fff8a640
Check fallback/payload
Got a payload
Loading segment from rom address 0xfff8a678
data (compression=1)
malloc Enter, size 36, free_mem_ptr 00160ce4
malloc 00160ce4
New segment dstaddr 0xee000 memsize 0x12000 srcaddr 0xfff8a6b0 filesize 0x8b45
(cleaned up) New segment addr 0xee000 size 0x12000 offset 0xfff8a6b0 filesize 0x8b45
Loading segment from rom address 0xfff8a694
Entry Point 0x000fc189
Loading Segment: addr: 0x00000000000ee000 memsz: 0x0000000000012000 filesz: 0x0000000000008b45
lb: [0x0000000000100000, 0x0000000000164000)
Post relocation: addr: 0x00000000000ee000 memsz: 0x0000000000012000 filesz: 0x0000000000008b45
using LZMA
[ 0x00000000000ee000, 0000000000100000, 0x0000000000100000) <- 00000000fff8a6b0
dest ee000, end 100000, bouncebuffer 7ff38000
Loaded segments
Jumping to boot code at fc189
entry = 0x000fc189
lb_start = 0x00100000
lb_size = 0x00064000
adjust = 0x7fe9c000
buffer = 0x7ff38000
elf_boot_notes = 0x00113a60
adjusted_boot_notes = 0x7ffafa60
Start bios (version pre-0.4.3-20091029_140826-nibbler)
init ivt
init bda
init pic
init timer
tsc calibrate start=3971561134 end=3974658928 diff=3097794
CPU Mhz=1804
math cp init
Find memory size
Attempting to find coreboot table
Found coreboot table forwarder.
Now attempting to find coreboot memory map
Found mainboard Arima HDAMA
Found CBFS header at 0xfffeffe0
Ram Size=0x80000000
Found 2 cpu(s) max supported 2 cpu(s)
malloc setup
init PMM
init PNPBIOS table
Scan for VGA option rom
Searching CBFS for prefix vgaroms/
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file pci14e4,16a6.rom
Found CBFS file
init usb
init keyboard
i8042 ctr old=0 new=20
Got ps2 nak (status=51); continuing
ps2_recvbyte timeout
keyboard command 2ff failed
init lpt
Found 0 lpt ports
init serial
Found 1 serial ports
init mouse
Relocating coreboot bios tables
Copying PIR from 0x3fff0400 to 0x000fdb90
Copying MPTABLE from 0x3fff1400/3fff1410 to 0x000fd970
init SMBIOS tables
SMBIOS ptr=0x000fd950 table=0x7ffff800
init boot device ordering
init floppy drives
init hard drives
Searching CBFS for prefix floppyimg/
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file pci14e4,16a6.rom
Found CBFS file
Scan for option roms
Attempting to init PCI bdf 00:18.0 (dev/ven 11001022)
Searching CBFS for prefix pci1022,1100.rom
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file pci14e4,16a6.rom
Found CBFS file
Attempting to map option rom on dev 00:18.0
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:18.1 (dev/ven 11011022)
Searching CBFS for prefix pci1022,1101.rom
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file pci14e4,16a6.rom
Found CBFS file
Attempting to map option rom on dev 00:18.1
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:18.2 (dev/ven 11021022)
Searching CBFS for prefix pci1022,1102.rom
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file pci14e4,16a6.rom
Found CBFS file
Attempting to map option rom on dev 00:18.2
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:18.3 (dev/ven 11031022)
Searching CBFS for prefix pci1022,1103.rom
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file pci14e4,16a6.rom
Found CBFS file
Attempting to map option rom on dev 00:18.3
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:19.0 (dev/ven 11001022)
Searching CBFS for prefix pci1022,1100.rom
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file pci14e4,16a6.rom
Found CBFS file
Attempting to map option rom on dev 00:19.0
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:19.1 (dev/ven 11011022)
Searching CBFS for prefix pci1022,1101.rom
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file pci14e4,16a6.rom
Found CBFS file
Attempting to map option rom on dev 00:19.1
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:19.2 (dev/ven 11021022)
Searching CBFS for prefix pci1022,1102.rom
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file pci14e4,16a6.rom
Found CBFS file
Attempting to map option rom on dev 00:19.2
Option rom sizing returned 0 0
Attempting to init PCI bdf 00:19.3 (dev/ven 11031022)
Searching CBFS for prefix pci1022,1103.rom
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file pci14e4,16a6.rom
Found CBFS file
Attempting to map option rom on dev 00:19.3
Option rom sizing returned 0 0
Searching CBFS for prefix genroms/
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file pci14e4,16a6.rom
Found CBFS file
Press F12 for boot menu.
finalize PMM
malloc finalize
zone 0: 00007c00-00090000 used=0 (0%)
zone 1: 000a0000-000a0000 used=0 (0%)
zone 2: 000fd440-000fdc40 used=752 (36%)
zone 3: 40000000-7fff0000 used=128 (0%)
zone 4: 7fff0000-80000000 used=2048 (3%)
Returned 61440 bytes of ZoneHigh
e820 map has 7 items:
0: 0000000000000000 - 000000000009f400 = 1
1: 000000000009f400 - 00000000000a0000 = 2
2: 00000000000f0000 - 0000000000100000 = 2
3: 0000000000100000 - 000000003fff0000 = 1
4: 000000003fff0000 - 0000000040000000 = 2
5: 0000000040000000 - 000000007ffff000 = 1
6: 000000007ffff000 - 0000000080000000 = 2
Jump to int19
enter handle_19:
NULL
Booting from Floppy...
fail handle_legacy_disk:801(1):
a=00000201 b=00000000 c=00000001 d=00000000 ds=0000 es=07c0 ss=0000
si=00000000 di=00000000 bp=00000000 sp=00007b00 cs=f000 ip=efc4 f=0202
Boot failed: could not read the boot disk
enter handle_18:
NULL
Booting from CD-Rom...
Boot failed: Could not read from CDROM (code 0001)
enter handle_18:
NULL
Booting from Hard Disk...
fail handle_legacy_disk:801(1):
a=00000201 b=00000000 c=00000001 d=00000080 ds=0000 es=07c0 ss=0000
si=00000000 di=00000000 bp=00000000 sp=00007b00 cs=f000 ip=efc4 f=0202
Boot failed: could not read the boot disk
enter handle_18:
NULL
Booting from CBFS...
Searching CBFS for prefix img/
Found CBFS file fallback/coreboot_ram
Found CBFS file fallback/payload
Found CBFS file pci14e4,16a6.rom
Found CBFS file
enter handle_18:
NULL
No bootable device.
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