[coreboot] BIOS RAM in AMD SB7XX southbridges ?

Andriy Gapon avg at icyb.net.ua
Wed Oct 28 08:43:36 CET 2009

on 28/10/2009 06:55 Darmawan Salihun said the following:
> On 10/28/09, Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> wrote:
>> On 27.10.2009 14:06, Darmawan Salihun wrote:
>>> What is the BIOS RAM in AMD SB7XX used for?
>>> Is it to buffer the BIOS contents from SPI flash chip prior to
>>> execution of the very first instruction?
>> No.
>>> I recall that it's impossible to execute code directly in an SPI chip.
>> Yes, but the chipset takes care of the SPI command interface and
>> presents the contents of the SPI chip nicely memory mapped to the CPU,
>> so the CPU can execute the ROM contents directly.
> I see. So, there must be some sort of independent
> microcontroller/microprocessor in the southbridge that "fetches" the
> contents of the SPI chip and "present" it in a "memory-mapped way"
> to the CPU. Probably this is how the BIOS RAM is used by the
> internal microcontroller/microprocessor in the southbridge.

No, I think.  "BIOS RAM" is some sort of scratch-pad memory for arbitrary use by

> I suspect this because an ex-intel engineer that I spoke to, told me that
> back then he was using ARM7TDMI to do the job of "presenting the BIOS
> contents in a memory-mapped way" to the CPU. These days, the function
> must've been integrated in the southbridge as you said.
> I suspect AMD do the same.

Yes, most probably.  But BIOS RAM has nothing to do with this.
Chipset directs memory access for certain range(s) to embedded SPI controller
which in turn translates them into appropriate SPI commands.

Andriy Gapon

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