[coreboot] BIOS RAM in AMD SB7XX southbridges ?
David Hendricks
dhendrix at google.com
Tue Oct 27 21:51:17 CET 2009
On Tue, Oct 27, 2009 at 6:06 AM, Darmawan Salihun <
darmawan.salihun at gmail.com> wrote:
> What is the BIOS RAM in AMD SB7XX used for?
>
Looks like scratchpad memory to me. From the public
doc<http://developer.amd.com/assets/43366_sb7xx_bdg_pub_1.00.pdf>
:
3.3 BIOS RAM
The SB700 has 256 bytes of BIOS RAM. Data in this RAM is preserved until
RSMRST# or S5 is
asserted, or until power is lost.
This RAM is accessed using index and data registers at CD4h/CD5h.
Might it be enough to act as a very, very small cache-as-RAM substitute
until CAR can be set up?
On Tue, Oct 27, 2009 at 6:06 AM, Darmawan Salihun <
darmawan.salihun at gmail.com> wrote:
> Is it to buffer the BIOS contents from SPI flash chip prior to
> execution of the very first instruction?
> I recall that it's impossible to execute code directly in an SPI chip.
>
That's correct, afaik.
--
David Hendricks (dhendrix)
Systems Software Engineer, Google Inc.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20091027/98c6bf85/attachment.html>
More information about the coreboot
mailing list