[coreboot] [v2] r4859 - in trunk/coreboot-v2/src/cpu/intel: model_6ex model_6fx

[svn at coreboot.org]

Author: stepan
Date: 2009-10-26 17:49:16 +0100 (Mon, 26 Oct 2009)
New Revision: 4859

Modified:
   trunk/coreboot-v2/src/cpu/intel/model_6ex/cache_as_ram.inc
   trunk/coreboot-v2/src/cpu/intel/model_6fx/cache_as_ram.inc
Log:
intel core and core 2:
- small preprocessor fix
- leave some space in the CAR area for the usbdebug structure
  if usbdebug is used

Signed-off-by: Stefan Reinauer <stepan at coresystems.de>
Acked-by: Peter Stuge <peter at stuge.se>



Modified: trunk/coreboot-v2/src/cpu/intel/model_6ex/cache_as_ram.inc
===================================================================
--- trunk/coreboot-v2/src/cpu/intel/model_6ex/cache_as_ram.inc	2009-10-26 16:48:27 UTC (rev 4858)
+++ trunk/coreboot-v2/src/cpu/intel/model_6ex/cache_as_ram.inc	2009-10-26 16:49:16 UTC (rev 4859)
@@ -94,7 +94,6 @@
 	//movl	$0x23322332, %eax
 	xorl	%eax, %eax
 	rep	stosl
-#endif
 
 	/* Enable Cache As RAM mode by disabling cache */
 	movl	%cr0, %eax
@@ -117,10 +116,16 @@
         /* enable cache */
         movl	%cr0, %eax
 	andl	$( ~( (1 << 30) | (1 << 29) ) ), %eax
-        movl	%eax, %cr0
+	movl	%eax, %cr0
+#endif
 
 	/* Set up stack pointer */
+#if defined(CONFIG_USBDEBUG_DIRECT) && (CONFIG_USBDEBUG_DIRECT == 1)
+	/* leave some space for the struct ehci_debug_info */
+	movl	$(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4 - 128), %eax
+#else
 	movl	$(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4), %eax
+#endif
 	movl	%eax, %esp
 
 	/* Restore the BIST result */

Modified: trunk/coreboot-v2/src/cpu/intel/model_6fx/cache_as_ram.inc
===================================================================
--- trunk/coreboot-v2/src/cpu/intel/model_6fx/cache_as_ram.inc	2009-10-26 16:48:27 UTC (rev 4858)
+++ trunk/coreboot-v2/src/cpu/intel/model_6fx/cache_as_ram.inc	2009-10-26 16:49:16 UTC (rev 4859)
@@ -101,7 +101,6 @@
 	//movl	$0x23322332, %eax
 	xorl	%eax, %eax
 	rep	stosl
-#endif
 
 	/* Enable Cache As RAM mode by disabling cache */
 	movl	%cr0, %eax
@@ -124,10 +123,16 @@
         /* enable cache */
         movl	%cr0, %eax
 	andl	$( ~( (1 << 30) | (1 << 29) ) ), %eax
-        movl	%eax, %cr0
+	movl	%eax, %cr0
+#endif
 
 	/* Set up stack pointer */
+#if defined(CONFIG_USBDEBUG_DIRECT) && (CONFIG_USBDEBUG_DIRECT == 1)
+	/* leave some space for the struct ehci_debug_info */
+	movl	$(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4 - 128), %eax
+#else
 	movl	$(CACHE_AS_RAM_BASE + CACHE_AS_RAM_SIZE - 4), %eax
+#endif
 	movl	%eax, %esp
 
 	/* Restore the BIST result */