[coreboot] [v2] r4821 - in trunk/coreboot-v2: src/mainboard/hp/e_vectra_p2706t targets/hp/e_vectra_p2706t
svn at coreboot.org
svn at coreboot.org
Wed Oct 21 02:35:42 CEST 2009
Author: uwe
Date: 2009-10-21 02:35:42 +0200 (Wed, 21 Oct 2009)
New Revision: 4821
Modified:
trunk/coreboot-v2/src/mainboard/hp/e_vectra_p2706t/Options.lb
trunk/coreboot-v2/targets/hp/e_vectra_p2706t/Config.lb
Log:
Add CONFIG_VGA_ROM_RUN to HP e-Vectra P2706T to make VGA init work.
Also add pci_rom entries (commented) to targets/hp/e_vectra_p2706t/Config.lb
for the same reason. They have to be uncommented to be used.
Signed-off-by: Uwe Hermann <uwe at hermann-uwe.de>
Acked-by: Uwe Hermann <uwe at hermann-uwe.de>
Modified: trunk/coreboot-v2/src/mainboard/hp/e_vectra_p2706t/Options.lb
===================================================================
--- trunk/coreboot-v2/src/mainboard/hp/e_vectra_p2706t/Options.lb 2009-10-20 22:36:34 UTC (rev 4820)
+++ trunk/coreboot-v2/src/mainboard/hp/e_vectra_p2706t/Options.lb 2009-10-21 00:35:42 UTC (rev 4821)
@@ -61,6 +61,7 @@
uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
uses CONFIG_CONSOLE_VGA
uses CONFIG_PCI_ROM_RUN
+uses CONFIG_VGA_ROM_RUN
uses CONFIG_WRITE_HIGH_TABLES
uses CONFIG_VIDEO_MB
@@ -94,6 +95,7 @@
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
default CONFIG_CONSOLE_VGA = 1
default CONFIG_PCI_ROM_RUN = 1
+default CONFIG_VGA_ROM_RUN = 1
default CONFIG_WRITE_HIGH_TABLES = 1
default CONFIG_VIDEO_MB = 1
end
Modified: trunk/coreboot-v2/targets/hp/e_vectra_p2706t/Config.lb
===================================================================
--- trunk/coreboot-v2/targets/hp/e_vectra_p2706t/Config.lb 2009-10-20 22:36:34 UTC (rev 4820)
+++ trunk/coreboot-v2/targets/hp/e_vectra_p2706t/Config.lb 2009-10-21 00:35:42 UTC (rev 4821)
@@ -37,3 +37,6 @@
buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal" "fallback"
+# pci_rom /tmp/vgabios.rom vendor_id=0x8086 device_id=0x7125
+# pci_rom /tmp/ethbios.rom vendor_id=0x10b7 device_id=0x9200
+
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