[coreboot] Boot issues (CBFS?) on VIA pc2500e

Uwe Hermann uwe at hermann-uwe.de
Wed Oct 14 20:10:21 CEST 2009


On Tue, Oct 06, 2009 at 12:00:08PM -0600, Myles Watson wrote:
> > Could you try this patch so we can narrow down where the problem is?
> Printing the information in hex will probably be better.

Diff of current trunk (buildtarget, not kconfig) with and without your patch.


--- minicom_pc2500e_trunk.cap	2009-10-14 20:02:56.000000000 +0200
+++ minicom_pc2500e_mylespatch.cap	2009-10-14 20:07:33.000000000 +0200
@@ -1,6 +1,6 @@
-coreboot-2.0.0-r4774-pc2500e Wed Oct 14 19:59:59 CEST 2009 booting...
+coreboot-2.0.0-r4774M-pc2500e Wed Oct 14 20:04:27 CEST 2009 booting...
 Calibrating delay loop...
-end 2dfa6557e, start 1dac7af45
+end 2e2687035, start 1dd89cf51
 32-bit delta 4173
 calibrate_tsc 32-bit result is 4173
 clocks_per_usec: 4173
@@ -163,8 +163,8 @@
 PCI: 00:1f.0, bad id 0xffffffff
 do_pci_scan_bridge for PCI: 00:01.0
 PCI: pci_scan_bus for bus 01
-malloc Enter, size 1100, free_mem_ptr 00020000
-malloc 00020000
+malloc Enter, size 1100, free_mem_ptr 00022000
+malloc 00022000
 PCI: 01:00.0 [1106/3344] ops
 PCI: 01:00.0 [1106/3344] enabled
 PCI: 01:01.0, bad id 0xffffffff
@@ -651,9 +651,9 @@
 Check fallback/payload
 CBFS: follow chain: fff80000 + 38 + 13fe8 + align -> fff94040
 Check fallback/coreboot_ram
-CBFS: follow chain: fff94040 + 38 + 88de + align -> fff9c980
+CBFS: follow chain: fff94040 + 38 + 8961 + align -> fff9ca00
 Check 
-CBFS: follow chain: fff9c980 + 28 + 53638 + align -> ffff0000
+CBFS: follow chain: fff9ca00 + 28 + 535b8 + align -> ffff0000
 CBFS:  Could not find file pci1106,3344.rom
 rom base, size: 0
 BAD SIGNATURE 0x0 0x10
@@ -696,7 +696,23 @@
 High Tables Base is 1fff0000.
 Copying Interrupt Routing Table to 0x000f0000... done.
 Copying Interrupt Routing Table to 0x1fff0000... done.
+0: entries 0, mpc_length 2c, mpe_length 0
+1: entries 1, mpc_length 40, mpe_length 0
+2: entries 4, mpc_length 58, mpe_length 0
+3: entries 5, mpc_length 60, mpe_length 0
+4: entries 6, mpc_length 68, mpe_length 0
+5: entries 12, mpc_length c8, mpe_length 0
+6: entries 22, mpc_length 148, mpe_length 0
+7: entries 24, mpc_length 158, mpe_length 0
 Wrote the mp table end at: 000f0410 - 000f0568
+0: entries 0, mpc_length ffff, mpe_length 0
+1: entries ffff, mpc_length ffff, mpe_length ffff
+2: entries ffff, mpc_length ffff, mpe_length ffff
+3: entries ffff, mpc_length ffff, mpe_length ffff
+4: entries ffff, mpc_length ffff, mpe_length ffff
+5: entries ffff, mpc_length ffff, mpe_length ffff
+6: entries ffff, mpc_length ffff, mpe_length ffff
+7: entries ffff, mpc_length ffff, mpe_length ffff
 Wrote the mp table end at: 1fff0410 - 2001040e
 Moving GDT to 0x20010800...ok
 Multiboot Information structure has been written.


Uwe.
-- 
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