[coreboot] Uh oh, looks like trouble...

ron minnich rminnich at gmail.com
Wed May 20 20:07:30 CEST 2009

On Wed, May 20, 2009 at 10:59 AM, Joshua McDowell
<jmcdowell at issisolutions.com> wrote:
> Hash: SHA1
> Intel® Server Board SE7520JR2
> http://www.intel.com/support/motherboards/server/se7520jr2/sb/cs-013736.htm
> I am currently waiting for someone to power up the storage device that
> may contain the lbflash source code.  I can tell you that lbflash uses
> /dev/mtdX to read and write to devices.  So it may not have what you are
> looking for, I don't know.

that tells us a lot. We actually planned to use mtd layer in 2000 for
everything, but there were continuous issues, so the stopgap
flash-and-burn (which became flashrom) never stopped being used.
LBFLASH went the mtd route, arguably better, it just never worked out
as well for many people as flashrom.


The board enable magic for your board might be found in the mtd
drivers. Intel habitually dedicates a GPIO pin for flash protection.
You have to set the GPIO low (usually) to enable flash writing. This
old mainboard certainly dates to that era.

And, it is unlikely that intel will tell you what the pin is.


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