[coreboot] [patch] flashrom: resending my patch about SPI/LPC conflicts

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Mon May 18 14:49:51 CEST 2009

On 02.02.2009 05:12, Bao, Zheng wrote:
> Signed-off-by: Zheng Bao <zheng.bao at amd.com>
> 3. When we read/write SPI, we use memory read/write instead of sending
> SPI command.

We have to be careful with SPI write. Some chips only support
single-byte write, others allow 128-byte write and even others allow
256-byte write. I have a small patch which will allow using 8-byte
writes on selected chips with SPI commands on SB600 and will send that
patch soon.



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