[coreboot] [flashrom] r512 - trunk

[svn at coreboot.org]

Author: hailfinger
Date: 2009-05-14 23:41:10 +0200 (Thu, 14 May 2009)
New Revision: 512

Modified:
   trunk/flash.h
   trunk/internal.c
   trunk/nic3com.c
Log:
Fix compilation of nic3com on 64bit.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Uwe Hermann <uwe at hermann-uwe.de>


Modified: trunk/flash.h
===================================================================
--- trunk/flash.h	2009-05-14 20:41:57 UTC (rev 511)
+++ trunk/flash.h	2009-05-14 21:41:10 UTC (rev 512)
@@ -585,6 +585,7 @@
 void physunmap(void *virt_addr, size_t len);
 
 /* internal.c */
+void get_io_perms(void);
 int internal_init(void);
 int internal_shutdown(void);
 void internal_chip_writeb(uint8_t val, volatile void *addr);

Modified: trunk/internal.c
===================================================================
--- trunk/internal.c	2009-05-14 20:41:57 UTC (rev 511)
+++ trunk/internal.c	2009-05-14 21:41:10 UTC (rev 512)
@@ -102,7 +102,7 @@
 {
 	int ret = 0;
 
-	get_io_perms(void);
+	get_io_perms();
 
 	/* Initialize PCI access for flash enables */
 	pacc = pci_alloc();	/* Get the pci_access structure */

Modified: trunk/nic3com.c
===================================================================
--- trunk/nic3com.c	2009-05-14 20:41:57 UTC (rev 511)
+++ trunk/nic3com.c	2009-05-14 21:41:10 UTC (rev 512)
@@ -158,7 +158,7 @@
 
 void nic3com_chip_writeb(uint8_t val, volatile void *addr)
 {
-	OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
+	OUTL((uint32_t)(intptr_t)addr, io_base_addr + BIOS_ROM_ADDR);
 	OUTB(val, io_base_addr + BIOS_ROM_DATA);
 }
 
@@ -174,7 +174,7 @@
 {
 	uint8_t val;
 
-	OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
+	OUTL((uint32_t)(intptr_t)addr, io_base_addr + BIOS_ROM_ADDR);
 	val = INB(io_base_addr + BIOS_ROM_DATA);
 
 	return val;