[coreboot] SB600 SPI hangs explained

[Carl-Daniel Hailfinger]

On 14.05.2009 03:31, Peter Stuge wrote:
> Carl-Daniel Hailfinger wrote:
>   
>> On some boards (with LPC flash) the SPI_BaseAddr is 0. The code did
>> not check for that condition and assumed the BAR was really at
>> address zero.
>>     
>
> The problem is of course, still, that it's impossible to really
> detect what the chipset is using. Is this the same also with SB700?
>   

The docs are not yet public, so I don't know.

> I guess you're using the SPI BAR value as part of the heuristic.
>   

Since accessing the SPI master is completely impossible if the SPI BAR
is located at 0x0 (unless flashrom includes code which can tell the OS
that a new BAR appeared and force the OS to reallocate resources), it is
a perfectly reliable indicator of SPI probe usability.
Note that even if a SPI flash chip were attached, probing for it would
still hang with the BAR at 0x0.
OTOH, even if no SPI chip is attached, probing will not hang as long as
the BAR is not at 0x0.

To summarize, the code does not check for presence of a SPI chip but
just if SPI accesses will hang. And since the hang is the real problem
at hand, the BAR checking works out just fine.


Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/