[coreboot] [PATCH] flashrom: Generic status register prettyprinting for SST25*
c-d.hailfinger.devel.2006 at gmx.net
Thu May 14 00:52:52 CEST 2009
On 14.05.2009 00:48, Cristi Magherusan wrote:
> On Wed, 2009-05-13 at 14:51 +0200, Carl-Daniel Hailfinger wrote:
>> Generic status register prettyprinting for SST25*. Even if we don't tell
>> the user about the areas the block locking bits correspond to, printing
>> a detailed list of which lock bits are set is a definite improvement.
>> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> This helps a lot debugging my write errors on SST25VF032B, So i'm glad
> to ack it.
> Acked-by: Cristi Magherusan <cristi.magherusan at net.utcluj.ro>
Thanks, committed in r505.
> Sample output:
> Probing for SST SST25VF032B, 4096 KB: RDID returned bf 25 4a.
> probe_spi_rdid_generic: id1 0xbf, id2 0x254a
> Chip status register is 1c
> Chip status register: Block Protect Write Disable (BPL) is not set
> Chip status register: Auto Address Increment Programming (AAI) is not
> Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
> Chip status register: Bit 4 / Block Protect 2 (BP2) is set
> Chip status register: Bit 3 / Block Protect 1 (BP1) is set
> Chip status register: Bit 2 / Block Protect 0 (BP0) is set
> Chip status register: Write Enable Latch (WEL) is not set
> Chip status register: Write In Progress (WIP/BUSY) is not set
> Found chip "SST SST25VF032B" (4096 KB) at physical address 0xffc00000.
> Carldani said that the write fails in my case because BP0..2 are set,
> and this patch helped a lot in spotting this out.
> Thanks carldani!
I'm happy that the patch helped. Now we just need to unset these block
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