[coreboot] locking...

[Stefan Reinauer]

On 20.06.2009 2:46 Uhr, Carl-Daniel Hailfinger wrote:
>>> A quick test abuild with #error inserted in the lockless function shows
>>> we indeed use it for every freaking x86 target.
>>> That explains the supermicro/h8dme intertwined printk messages Ward is
>>> seeing.
>>>   
>>>     
>>>       
>> They're from ram init stage afaict ...
>>   
>>     
>
> If we need them instead of the generic variants, we should know a reason
> for such usage.
>   

Yes, the reasons are

- no console "drivers" in the stage2/coreboot_ram style at this level
- no spinlocking because we have no ram that is available to and shared
by all cpus

>>> Besides that, do we know where static spinlock_t console_lock is placed?
>>>   
>>>     
>>>       
>> In RAM
>>   
>>     
>
> So we'd get uninitialied data for any pre-RAM spinlock access? The v3
> global variable mechanism should solve this nicely. At least it was
> designed for that.
But was it designed for safe IPC (Inter Processor Communication ;-) ?

Stefan


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