[coreboot] locking...

Stefan Reinauer stepan at coresystems.de
Fri Jun 19 19:49:06 CEST 2009

ron minnich wrote:
> yes, that is why I did that struct-based stack in my v3 SMP startup.
So, which problem does this solve, the pre-ram locking or the post-ram

- the pre-ram locking can't be done with a stack, because the cache
between CPUs is not always necessarily in the same state.
-the post-ram code does not need it, works quite nicely already.

This approach scares me... it doesn't solve the one case but makes the
other case much more complex.

Please explain... I must be getting something wrong.

coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 • Fax: +49 761 7664613
Email: info at coresystems.dehttp://www.coresystems.de/
Registergericht: Amtsgericht Freiburg • HRB 7656
Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866

More information about the coreboot mailing list