[coreboot] [v2] r4358 - trunk/coreboot-v2/src/cpu/amd/model_10xxx

svn at coreboot.org svn at coreboot.org
Wed Jun 17 01:02:40 CEST 2009


Author: mjones
Date: 2009-06-17 01:02:39 +0200 (Wed, 17 Jun 2009)
New Revision: 4358

Modified:
   trunk/coreboot-v2/src/cpu/amd/model_10xxx/init_cpus.c
Log:
Maximilian Thuermer found a bug where the HT link capability code was always
updating the passed value to the next link offset even when it was on the
requested link (cap_count).

Maximilian also found a bug where the linktype was still getting attributes
even when it wasn't initialized.

This should fix the HT problems for Fam10 C2. There are still issues with the
microcode which need to be resolved.

Signed-off-by: Marc Jones <marcj303 at gmail.com>
Acked-by: Ward Vandewege <ward at gnu.org>



Modified: trunk/coreboot-v2/src/cpu/amd/model_10xxx/init_cpus.c
===================================================================
--- trunk/coreboot-v2/src/cpu/amd/model_10xxx/init_cpus.c	2009-06-16 15:02:52 UTC (rev 4357)
+++ trunk/coreboot-v2/src/cpu/amd/model_10xxx/init_cpus.c	2009-06-16 23:02:39 UTC (rev 4358)
@@ -719,11 +719,13 @@
 	do {
 		val = pci_read_config32(NODE_PCI(node, 0), val);
 		/* Is the capability block a HyperTransport capability block? */
-		if ((val & 0xFF) == 0x08)
+		if ((val & 0xFF) == 0x08) {
 			/* Is the HT capability block an HT Host Capability? */
 			if ((val & 0xE0000000) == (1 << 29))
 				cap_count--;
-		val = (val >> 8) & 0xFF;
+		}
+		if (cap_count)
+			val = (val >> 8) & 0xFF;
 	} while (cap_count && val);
 
 	*offset = (u8) val;
@@ -745,9 +747,9 @@
 u32 AMD_checkLinkType (u8 node, u8 link, u8 regoff)
 {
 	u32 val;
-	u32 linktype;
+	u32 linktype = 0;
 
-	/* Check coherency */
+	/* Check connect, init and coherency */
 	val = pci_read_config32(NODE_PCI(node, 0), regoff + 0x18);
 	val &= 0x1F;
 
@@ -757,23 +759,24 @@
 	if (val == 7)
 		linktype |= HTPHY_LINKTYPE_NONCOHERENT;
 
-	/* Check gen3 */
-	val = pci_read_config32(NODE_PCI(node, 0), regoff + 0x08);
+	if (linktype) {
+		/* Check gen3 */
+		val = pci_read_config32(NODE_PCI(node, 0), regoff + 0x08);
 
-	if (((val >> 8) & 0x0F) > 6)
-		linktype |= HTPHY_LINKTYPE_HT3;
-	else
-		linktype |= HTPHY_LINKTYPE_HT1;
+		if (((val >> 8) & 0x0F) > 6)
+			linktype |= HTPHY_LINKTYPE_HT3;
+		else
+			linktype |= HTPHY_LINKTYPE_HT1;
 
 
-	/* Check ganged */
-	val = pci_read_config32(NODE_PCI(node, 0), (link << 2) + 0x170);
+		/* Check ganged */
+		val = pci_read_config32(NODE_PCI(node, 0), (link << 2) + 0x170);
 
-	if ( val & 1)
-		linktype |= HTPHY_LINKTYPE_GANGED;
-	else
-		linktype |= HTPHY_LINKTYPE_UNGANGED;
-
+		if ( val & 1)
+			linktype |= HTPHY_LINKTYPE_GANGED;
+		else
+			linktype |= HTPHY_LINKTYPE_UNGANGED;
+	}
 	return linktype;
 }
 





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