[coreboot] ft4232-based spi programmer
Carl-Daniel Hailfinger
c-d.hailfinger.devel.2006 at gmx.net
Fri Jun 12 12:22:56 CEST 2009
This patch adds support for a new SPI programmer, based on the
FT2232H/4232H chip from FTDI.
Until we have a solution for the compilation/linking dependency on
libftdi, support for this feature is stubbed out by default. This allows
us to commit the code now and work on a solution later.
Paul writes:
There are certainly possible improvements: The code has hard-coded
values for which interface of the ftdi chip to use (interface B was
chosen because libftdi seems to have trouble with A right now), what
clock rate use for the SPI interface (I've been running at 30Mhz, but
the patch sets it to 10Mhz), and possibly others. I think this means
that per-programmer options might be a good idea at some point.
Carl-Daniel writes:
There is one additional FIXME comment in the code, but AFAICS that
problem is not solvable with current libftdi.
Signed-off-by: Paul Fox <pgf at laptop.org>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Index: flashrom-ftdi2232_spi/flash.h
===================================================================
--- flashrom-ftdi2232_spi/flash.h (Revision 583)
+++ flashrom-ftdi2232_spi/flash.h (Arbeitskopie)
@@ -85,6 +85,7 @@
#define PROGRAMMER_NIC3COM 0x02
#define PROGRAMMER_SATASII 0x03
#define PROGRAMMER_IT87SPI 0x04
+#define PROGRAMMER_FT2232SPI 0x05
struct programmer_entry {
const char *vendor;
@@ -707,6 +708,13 @@
uint8_t satasii_chip_readb(const chipaddr addr);
extern struct pcidev_status satas_sii[];
+/* ft2232_spi.c */
+int ft2232_spi_init(void);
+int ft2232_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
+int ft2232_spi_read(struct flashchip *flash, uint8_t *buf);
+int ft2232_spi_write1(struct flashchip *flash, uint8_t *buf);
+int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf);
+
/* flashrom.c */
extern int verbose;
#define printf_debug(x...) { if (verbose) printf(x); }
@@ -733,6 +741,7 @@
SPI_CONTROLLER_SB600,
SPI_CONTROLLER_VIA,
SPI_CONTROLLER_WBSIO,
+ SPI_CONTROLLER_FT2232,
SPI_CONTROLLER_DUMMY,
};
extern enum spi_controller spi_controller;
Index: flashrom-ftdi2232_spi/spi.c
===================================================================
--- flashrom-ftdi2232_spi/spi.c (Revision 583)
+++ flashrom-ftdi2232_spi/spi.c (Arbeitskopie)
@@ -46,6 +46,8 @@
return sb600_spi_command(writecnt, readcnt, writearr, readarr);
case SPI_CONTROLLER_WBSIO:
return wbsio_spi_command(writecnt, readcnt, writearr, readarr);
+ case SPI_CONTROLLER_FT2232:
+ return ft2232_spi_command(writecnt, readcnt, writearr, readarr);
case SPI_CONTROLLER_DUMMY:
return dummy_spi_command(writecnt, readcnt, writearr, readarr);
default:
@@ -211,6 +213,7 @@
case SPI_CONTROLLER_VIA:
case SPI_CONTROLLER_SB600:
case SPI_CONTROLLER_WBSIO:
+ case SPI_CONTROLLER_FT2232:
case SPI_CONTROLLER_DUMMY:
return probe_spi_rdid_generic(flash, 4);
default:
@@ -686,6 +689,8 @@
return ich_spi_read(flash, buf);
case SPI_CONTROLLER_WBSIO:
return wbsio_spi_read(flash, buf);
+ case SPI_CONTROLLER_FT2232:
+ return ft2232_spi_read(flash, buf);
default:
printf_debug
("%s called, but no SPI chipset/strapping detected\n",
@@ -734,6 +739,8 @@
return ich_spi_write_256(flash, buf);
case SPI_CONTROLLER_WBSIO:
return wbsio_spi_write_1(flash, buf);
+ case SPI_CONTROLLER_FT2232:
+ return ft2232_spi_write_256(flash, buf);
default:
printf_debug
("%s called, but no SPI chipset/strapping detected\n",
Index: flashrom-ftdi2232_spi/Makefile
===================================================================
--- flashrom-ftdi2232_spi/Makefile (Revision 583)
+++ flashrom-ftdi2232_spi/Makefile (Arbeitskopie)
@@ -34,7 +34,7 @@
sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o physmap.o \
flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \
ichspi.o w39v040c.o sb600spi.o wbsio_spi.o m29f002.o internal.o \
- dummyflasher.o pcidev.o nic3com.o satasii.o
+ dummyflasher.o pcidev.o nic3com.o satasii.o ft2232_spi.o
all: pciutils dep $(PROGRAM)
Index: flashrom-ftdi2232_spi/ft2232_spi.c
===================================================================
--- flashrom-ftdi2232_spi/ft2232_spi.c (Revision 0)
+++ flashrom-ftdi2232_spi/ft2232_spi.c (Revision 0)
@@ -0,0 +1,303 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2009 Paul Fox <pgf at laptop.org>
+ * Copyright (C) 2009 Carl-Daniel Hailfinger
+ *
+ * based initially on example program bitbang_ft2232.c from
+ * the libftdi-0.16 distribution, from:
+ * Intra2net AG <opensource at intra2net.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+#include <stdlib.h>
+#include "flash.h"
+#include "spi.h"
+
+/* If you want FT2232 SPI support, please add -lftdi to LIBS in the Makefile
+ * and change FT2232_SPI_SUPPORT to 1 in the following line.
+ */
+#define FT2232_SPI_SUPPORT 0
+#if FT2232_SPI_SUPPORT == 1
+
+#include "ftdi.h"
+
+/* the 'H' chips can run internally at either 12Mhz or 60Mhz.
+ * the non-H chips can only run at 12Mhz. */
+#define CLOCK_5X 1
+
+/* in either case, the divisor is a simple integer clock divider.
+ * if CLOCK_5X is set, this divisor divides 30Mhz, else it
+ * divides 6Mhz */
+#define DIVIDE_BY 3 // e.g. '3' will give either 10Mhz or 2Mhz spi clock
+
+
+static struct ftdi_context ftdic_context;
+
+int send_buf(struct ftdi_context *ftdic, const unsigned char *buf, int size)
+{
+ int r;
+ r = ftdi_write_data(ftdic, (unsigned char *) buf, size);
+ if (r < 0) {
+ fprintf(stderr, "ftdi_write_data: %d, %s\n", r,
+ ftdi_get_error_string(ftdic));
+ return 1;
+ }
+ return 0;
+}
+
+int get_buf(struct ftdi_context *ftdic, const unsigned char *buf, int size)
+{
+ int r;
+ r = ftdi_read_data(ftdic, (unsigned char *) buf, size);
+ if (r < 0) {
+ fprintf(stderr, "ftdi_read_data: %d, %s\n", r,
+ ftdi_get_error_string(ftdic));
+ return 1;
+ }
+ return 0;
+}
+
+int ft2232_spi_init(void)
+{
+ int f;
+ struct ftdi_context *ftdic = &ftdic_context;
+ unsigned char buf[512];
+ unsigned char port_val = 0;
+
+
+ if (ftdi_init(ftdic) < 0) {
+ fprintf(stderr, "ftdi_init failed\n");
+ return EXIT_FAILURE;
+ }
+
+ // f = ftdi_usb_open(ftdic, 0x0403, 0x6010); // FT2232
+ f = ftdi_usb_open(ftdic, 0x0403, 0x6011); // FT4232
+
+ if (f < 0 && f != -5) {
+ fprintf(stderr, "unable to open ftdi device: %d (%s)\n", f,
+ ftdi_get_error_string(ftdic));
+ exit(-1);
+ }
+
+ if (ftdi_set_interface(ftdic, INTERFACE_B) < 0) {
+ fprintf(stderr, "unable to select FT2232 channel B: %s\n",
+ ftdic->error_str);
+ }
+
+ if (ftdi_usb_reset(ftdic) < 0) {
+ fprintf(stderr, "unable to reset ftdi device\n");
+ }
+
+ if (ftdi_set_latency_timer(ftdic, 2) < 0) {
+ fprintf(stderr, "unable to set latency timer\n");
+ }
+
+ if (ftdi_write_data_set_chunksize(ftdic, 512)) {
+ fprintf(stderr, "unable to set chunk size\n");
+ }
+
+ if (ftdi_set_bitmode(ftdic, 0x00, 2) < 0) {
+ fprintf(stderr, "unable to set bitmode\n");
+ }
+
+#if CLOCK_5X
+ printf_debug("disable divide-by-5 front stage\n");
+ buf[0] = 0x8a; /* disable divide-by-5 */
+ if (send_buf(ftdic, buf, 1))
+ return -1;
+#define MPSSE_CLK 60.0
+
+#else
+
+#define MPSSE_CLK 12.0
+
+#endif
+ printf_debug("set clock divisor\n");
+ buf[0] = 0x86; /* command "set divisor" */
+ /* valueL/valueH are (desired_divisor - 1) */
+ buf[1] = (DIVIDE_BY-1) & 0xff;
+ buf[2] = ((DIVIDE_BY-1) >> 8) & 0xff;
+ if (send_buf(ftdic, buf, 3))
+ return -1;
+
+ printf("spi clock is %fMhz\n",
+ (double)(MPSSE_CLK / (((DIVIDE_BY-1) + 1) * 2)));
+
+ /* Disconnect TDI/DO to TDO/DI for Loopback */
+ printf_debug("no loopback of tdi/do tdo/di\n");
+ buf[0] = 0x85;
+ if (send_buf(ftdic, buf, 1))
+ return -1;
+
+ printf_debug("set data bits\n");
+ /* Set data bits low-byte command:
+ * value: 0x08 CS=high, DI=low, DO=low, SK=low
+ * dir: 0x0b CS=output, DI=input, DO=output, SK=output
+ */
+#define CS_BIT 0x08
+
+ buf[0] = SET_BITS_LOW;
+ buf[1] = (port_val = CS_BIT);
+ buf[2] = 0x0b;
+ if (send_buf(ftdic, buf, 3))
+ return -1;
+
+ printf_debug("\nft2232 chosen\n");
+
+ buses_supported = CHIP_BUSTYPE_SPI;
+ spi_controller = SPI_CONTROLLER_FT2232;
+
+ return 0;
+}
+
+int ft2232_spi_command(unsigned int writecnt, unsigned int readcnt,
+ const unsigned char *writearr, unsigned char *readarr)
+{
+ struct ftdi_context *ftdic = &ftdic_context;
+ static unsigned char *buf = NULL;
+ unsigned char port_val = 0;
+ int i, ret = 0;
+
+ buf = realloc(buf, writecnt + readcnt + 100);
+ if (!buf) {
+ fprintf(stderr, "Out of memory!\n");
+ exit(1);
+ }
+
+ i = 0;
+
+ /* minimize USB transfers by packing as many commands
+ * as possible together. if we're not expecting to
+ * read, we can assert CS, write, and deassert CS all
+ * in one shot. if reading, we do three separate
+ * operations. */
+ printf_debug("Assert CS#\n");
+ buf[i++] = SET_BITS_LOW;
+ buf[i++] = (port_val &= ~CS_BIT);
+ buf[i++] = 0x0b;
+
+ if (writecnt) {
+ buf[i++] = 0x11;
+ buf[i++] = (writecnt - 1) & 0xff;
+ buf[i++] = ((writecnt - 1) >> 8) & 0xff;
+ memcpy(buf+i, writearr, writecnt);
+ i += writecnt;
+ }
+
+ /* optionally terminate this batch of commands with a
+ * read command, then do the fetch of the results.
+ */
+ if (readcnt) {
+ buf[i++] = 0x20;
+ buf[i++] = (readcnt - 1) & 0xff;
+ buf[i++] = ((readcnt - 1) >> 8) & 0xff;
+ ret = send_buf(ftdic, buf, i);
+ i = 0;
+ if (ret) goto deassert_cs;
+
+ /* FIXME: This is unreliable. There's no guarantee that we read
+ * the response directly after sending the read command.
+ * We may be scheduled out etc.
+ */
+ ret = get_buf(ftdic, readarr, readcnt);
+
+ }
+
+ deassert_cs:
+ printf_debug("de-assert CS#\n");
+ buf[i++] = SET_BITS_LOW;
+ buf[i++] = (port_val |= CS_BIT);
+ buf[i++] = 0x0b;
+ if (send_buf(ftdic, buf, i))
+ return -1;
+
+ return ret;
+}
+
+int ft2232_spi_read(struct flashchip *flash, uint8_t *buf)
+{
+ int total_size = flash->total_size * 1024;
+ int i, n;
+
+ /* the ft2232/ft4232 will transfer up to 64K at a time */
+ n = 64 * 1024;
+ for (i = 0; i < total_size; i += n) {
+ int toread = n;
+ if (total_size - i < toread)
+ toread = total_size - i;
+ spi_nbyte_read(i, buf + i, toread);
+ }
+
+ return 0;
+}
+
+int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf)
+{
+ int total_size = 1024 * flash->total_size;
+ int i;
+
+ printf_debug("total_size is %d\n", total_size);
+ for (i = 0; i < total_size; i += 256) {
+ int l, r;
+ if (i + 256 <= total_size)
+ l = 256;
+ else
+ l = total_size - i;
+
+ spi_write_enable();
+ if ((r = spi_nbyte_program(i, &buf[i], l))) {
+ fprintf(stderr, "%s: write fail %d\n", __FUNCTION__, r);
+ // spi_write_disable(); chip does this for us
+ return 1;
+ }
+
+ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+ /* loop */;
+ }
+ // spi_write_disable(); chip does this for us
+
+ return 0;
+}
+
+#else
+int ft2232_spi_init(void)
+{
+ fprintf(stderr, "FT2232 SPI support was not compiled in\n");
+ exit(1);
+}
+
+int ft2232_spi_command(unsigned int writecnt, unsigned int readcnt,
+ const unsigned char *writearr, unsigned char *readarr)
+{
+ fprintf(stderr, "FT2232 SPI support was not compiled in\n");
+ exit(1);
+}
+
+int ft2232_spi_read(struct flashchip *flash, uint8_t *buf)
+{
+ fprintf(stderr, "FT2232 SPI support was not compiled in\n");
+ exit(1);
+}
+
+int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf)
+{
+ fprintf(stderr, "FT2232 SPI support was not compiled in\n");
+ exit(1);
+}
+#endif
Index: flashrom-ftdi2232_spi/flashrom.c
===================================================================
--- flashrom-ftdi2232_spi/flashrom.c (Revision 583)
+++ flashrom-ftdi2232_spi/flashrom.c (Arbeitskopie)
@@ -115,6 +115,22 @@
.delay = internal_delay,
},
+ {
+ .init = ft2232_spi_init,
+ .shutdown = dummy_shutdown,
+ .map_flash_region = dummy_map,
+ .unmap_flash_region = dummy_unmap,
+ .chip_readb = dummy_chip_readb,
+ .chip_readw = fallback_chip_readw,
+ .chip_readl = fallback_chip_readl,
+ .chip_readn = fallback_chip_readn,
+ .chip_writeb = dummy_chip_writeb,
+ .chip_writew = fallback_chip_writew,
+ .chip_writel = fallback_chip_writel,
+ .chip_writen = fallback_chip_writen,
+ .delay = internal_delay,
+ },
+
{},
};
@@ -495,7 +511,7 @@
" -i | --image <name>: only flash image name from flash layout\n"
" -L | --list-supported: print supported devices\n"
" -p | --programmer <name>: specify the programmer device\n"
- " (internal, dummy, nic3com, satasii, it87spi)\n"
+ " (internal, dummy, nic3com, satasii, it87spi, ft2232spi)\n"
" -h | --help: print this help text\n"
" -R | --version: print the version (release)\n"
"\nIf no file is specified, then all that happens"
@@ -631,6 +647,8 @@
pcidev_bdf = strdup(optarg + 8);
} else if (strncmp(optarg, "it87spi", 7) == 0) {
programmer = PROGRAMMER_IT87SPI;
+ } else if (strncmp(optarg, "ft2232spi", 9) == 0) {
+ programmer = PROGRAMMER_FT2232SPI;
} else {
printf("Error: Unknown programmer.\n");
exit(1);
--
http://www.hailfinger.org/
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