[coreboot] [patch][v2]:fam10 microcode

Marc Jones marcj303 at gmail.com
Wed Jun 3 17:45:23 CEST 2009

On Tue, Jun 2, 2009 at 3:02 PM, Ward Vandewege <ward at gnu.org> wrote:
> On Tue, Jun 02, 2009 at 02:27:58PM -0600, Marc Jones wrote:
>> You are the first to try this on a real system. Nothing is jumping out
>> at me in the code. If you can put in some debug checks around there it
>> will be helpful to figure out.
> Sure. I've sprinkled some debug code and traced the hang to this bit of code
> in cpu/amd/model_10xxx/init_cpus.c, void AMD_SetHtPhyRegister:
>    /* Now get the current phy register data
>     * LinkPhyDone = 0, LinkPhyWrite = 0 is a read
>     */
>    phyReg |= fam10_htphy_default[entry].htreg;
>    pci_write_config32(NODE_PCI(node, 4), phyBase, phyReg);
>    do {
>      val = pci_read_config32(NODE_PCI(node, 4), phyBase);
>    } while (!(val & HTPHY_IS_COMPLETE_MASK));
> That's an infinite loop on the second CPU, apparently.

It looks like the errata for C2 are needed with the microcode update.
There are several new ones: Revision Guide for AMD Family 10h
Processors. http://developer.amd.com/documentation/guides/Pages/default.aspx

Errata 327 seems like it might be the issue since it is in the same
registers. I'll look and see where the best place for making the
change. I should have some free time this afternoon.



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