[coreboot] non static < 0x1000 IO space can be broken | (EP80579) Addition

[Arnaud Maye]

Hello Gents,

I've been on IRC for a GFX output issue on Friday. Actually the output 
is always black or full of non sense
square on the screen. I have tried two graphic cards and in this respect 
it is fair to point the issue outside of
the vgarom.

The odd thing is that the PCI card am using having some IOs below 
0x1000. A few other peripherals are
there as well. I have attached the complete log. I am having an issue 
with seabios and the keyboard input..
this is part of the log as well.

Here is an extract of what seems to be interesting :

PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 
limit: ffff
PCI: 00:02.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 
limit: ffff
PCI: 00:02.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 
limit: ffff done
PCI: 00:03.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 
limit: ffff
PCI: 02:00.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 
limit: ffffffff
PCI: 03:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 
limit: ffffffff
PCI: 03:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 
limit: ffffffff done
PCI: 03:02.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 
limit: ffffffff
PCI: 03:02.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 
limit: ffffffff done
PCI: 03:03.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 
limit: ffffffff
PCI: 03:03.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 
limit: ffffffff done
PCI: 03:04.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 
limit: ffffffff
PCI: 07:00.0 24 *  [0x0 - 0x7f] io
PCI: 03:04.0 compute_resources_io: base: 80 size: 1000 align: 12 gran: 
12 limit: ffff done
PCI: 03:04.0 1c *  [0x0 - 0xfff] io
PCI: 02:00.0 compute_resources_io: base: 1000 size: 1000 align: 12 gran: 
12 limit: ffff done
PCI: 02:00.0 1c *  [0x0 - 0xfff] io
PCI: 00:03.0 compute_resources_io: base: 1000 size: 1000 align: 12 gran: 
12 limit: ffff done
PCI: 00:04.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 
limit: ffff
PCI: 08:00.0 14 *  [0x0 - 0x1f] io
PCI: 08:01.0 14 *  [0x20 - 0x3f] io
PCI: 08:02.0 14 *  [0x40 - 0x5f] io
PCI: 00:04.0 compute_resources_io: base: 60 size: 1000 align: 12 gran: 
12 limit: ffff done
PCI: 00:03.0 1c *  [0x0 - 0xfff] io
PCI: 00:04.0 1c *  [0x1000 - 0x1fff] io

and then :

Setting resources...
PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:2428 align:12 
gran:0 limit:ffff
Assigned: PCI: 00:03.0 1c *  [0x1000 - 0x1fff] io
Assigned: PCI: 00:04.0 1c *  [0x2000 - 0x2fff] io
Assigned: PCI: 00:1f.0 40 *  [0x3000 - 0x307f] io
Assigned: PCI: 00:1f.0 48 *  [0x3080 - 0x30bf] io
Assigned: PCI: 00:1d.0 20 *  [0x30c0 - 0x30df] io
Assigned: PCI: 00:1f.3 20 *  [0x30e0 - 0x30ff] io

Should we not see there all the resources below 0x1000? PCI: 07:00.0 is 
my PCIe graphic
card (PCI: 07:00.0 24 *  [0x0 - 0x7f] io).

Rudolf, may you look at the allocation to see if something is odd or not?

Thanks,

Arnaud


Myles Watson wrote:
>
>
> On Mon, Jul 20, 2009 at 8:14 AM, Rudolf Marek <r.marek at assembler.cz 
> <mailto:r.marek at assembler.cz>> wrote:
>
>     Hi Myles,
>
>         That's the way the rest of the boards did it.  I'm sorry I
>         missed this
>         southbridge.  I thought I got them all.
>
>
>     Ok. Please prepare the patch.
>
> Attached.
>
> Signed-off-by: Myles Watson <mylesgw at gmail.com 
> <mailto:mylesgw at gmail.com>>
>
>         I noticed in your patch that you're setting the limit =
>         base+size-1.  The
>         limit is not the same as the end of the resource.  For most
>         I/O, the limit
>         should be 0xffff.
>
>
>     aha true. This was cut and paste from k8t890 where it was used to
>     setup APIC resource. For mem resource it should be how? I don't
>     understand the gran too.
>
> The limit should always be the upper bound that a type of resource 
> could be set to.  For I/O 0xffff, for MEM, 0xffffffff...
>
> gran sets the granularity of an allocation.  For example, on K8 you 
> have to allocate I/O to links at least 4K at a time, so the 
> granularity is 12.  gran and align should never matter for fixed 
> resources. 
>  
>
>     For this SB (the VT8237S) we will definitely need to dynamically
>     allocate a mmio BAR for SPI controller. I will prepare a patch,
>     but cannot test.
>
>     I would like to ask if you care about the decoding range for
>     flashes - if I need some other resource for that and also about
>     0xfee... for MSI.
>
>
> Anything above 0xfec... doesn't matter, since you have an APIC 
> resource there.
>
> Thanks,
> Myles
>

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