[coreboot] fam10/h8dmr: extreme slowness in CBFS memset / memcpy
ward at gnu.org
Tue Jul 21 14:51:18 CEST 2009
On Tue, Jul 21, 2009 at 06:25:38AM -0600, Myles Watson wrote:
> > Following up on this - Patrick helped in IRC this evening, and we came to
> > the
> > conclusion that it's probably *not* an MTRR issue, since we figured out
> > the
> > code seems to set MTRRs properly.
> I wonder what else could cause it to be so slow? It's especially surprising
> for the memset, which is pretty simple. Does it use movnti for that?
It's actually just a plain byte-by-byte assignment in c, see
> > We found out after adding an extra MTRR over the flash chip, which did not
> > change anything.
> Did you disable and re-enable the cache so that the settings take effect?
Hmm, we tried adding it here
in function set_init_ram_access, which already sets an mtrr.
This gets called just before CAR is disabled I think.
And then we found the mtrr set in
which looks like it *should* do the right thing. But that's assembler of
course. I don't suppose there's a way to print debug info from right there?
> I guess I would:
> 1. Add some little benchmark loops reading/writing different areas
> a. read ROM & time it
> b. read from RAM (cached area) and time it
> c. read from RAM (non-cached area)
> d. write to RAM (cached area)
> 2. disable MTRRs to see if it would go even slower.
> Sorry that's not much help, but I don't have a fam10 box to try things on.
Thanks - will see if I can try some of these things.
Ward Vandewege <ward at gnu.org>
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