[coreboot] ACPI on m57sli v1.0

[Tiago Marques]

Hi,

One thing I would like to ask, not just regarding this motherboard but
all AM2/AM2+/AM3 boards.
Would it be possible to implement a feature that would allow us to
configure custom P-States to save on CMOS, other than what the
manufacturer specifies? Most BIOS allow setting lower and higher
multipliers than stock on some CPUs but disable CPU power management
altogether when doing so. It would be quite a leap forward, when
compared with vendor BIOS to be able to specify at least one VID and
FID for the high power state and another FID and VID for the low power
state.

With overclocking the benefits are enormous in the power bill and also
for the low power state, since the manufacturer specifies 1.1v @ 1GHz
and most CPUs handle 0.8v @ 800MHz quite easily. I'd love to get those
low power states on my home server :)

I've been trying to get hold of one of these M57SLI-S4 boards to try
and implement this but would like to know if this is something
possible to achieve with the current code base.

Best regards,
Tiago Marques


On Fri, Jul 3, 2009 at 3:55 PM, Harald Gutmann<harald.gutmann at gmx.net> wrote:
> On Friday 03 July 2009 00:15:33 Rudolf Marek wrote:
>> > Maybe Rudolf Marek can us help here, because he wrote the automatic
>> > generation for that ACPI table (SSDT).
>>
>> Hi,
>>
>> If I understand correctly, the 1800MHz is missing? If so, please check what
>> is the portal frequency for this CPU. Maybe it is 2000 and not 1800 (so
>> prop bios is wrong). Check the BKDG. I'm very busy so I think better would
>> be if someone else could check.
> I'll also check this, to see if coreboot or vendor is wrong.
> Thanks for you fast reply!
>
>> The interupt driven parport works now?
> Right now the parport is just working with polling.
> But I think I can fix it to get it interrupt driven with a little dsdt.asl
> patch.
>
> (Maybe sunday, or even towmorrow.)
>>
>> Rudolf
> Regards,
> Harald
>
> --
> coreboot mailing list: coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot
>