[coreboot] r3885 - trunk/coreboot-v2/src/northbridge/intel/i945

[svn at coreboot.org]

Author: stepan
Date: 2009-01-20 23:46:52 +0100 (Tue, 20 Jan 2009)
New Revision: 3885

Modified:
   trunk/coreboot-v2/src/northbridge/intel/i945/raminit.c
Log:
fix small TOLUD issue in i945 raminit (trivial)

Signed-off-by: Stefan Reinauer <stepan at coresystems.de>
Acked-by: Stefan Reinauer <stepan at coresystems.de>



Modified: trunk/coreboot-v2/src/northbridge/intel/i945/raminit.c
===================================================================
--- trunk/coreboot-v2/src/northbridge/intel/i945/raminit.c	2009-01-20 22:39:31 UTC (rev 3884)
+++ trunk/coreboot-v2/src/northbridge/intel/i945/raminit.c	2009-01-20 22:46:52 UTC (rev 3885)
@@ -497,7 +497,7 @@
 	}
 	
 	if (sysinfo->memory_frequency && sysinfo->cas) {
-		printk_debug("Memory will be driven at %dMHz with CAS=%d clocks\n", 
+		printk_debug("Memory will be driven at %dMHz with CAS=%d clocks\n",
 				sysinfo->memory_frequency, sysinfo->cas);
 	} else {
 		die("Could not find common memory frequency and CAS\n");
@@ -1348,11 +1348,11 @@
 	/* Some extra checks needed. See 4.1.26 in the 
 	 * 82945G MCH datasheet (30750203)
 	 */
-	pci_write_config8(PCI_DEV(0,0,0), TOLUD, tolud);
+	pci_write_config16(PCI_DEV(0,0,0), TOLUD, tolud);
 	
 	printk_debug("C0DRB = 0x%08x\n", MCHBAR32(C0DRB0));
 	printk_debug("C1DRB = 0x%08x\n", MCHBAR32(C1DRB0));
-	printk_debug("TOLUD = 0x%02x\n", tolud);
+	printk_debug("TOLUD = 0x%04x\n", tolud);
 
 	pci_write_config16(PCI_DEV(0,0,0), TOM, tolud>>3);