[coreboot] Coreboot patches for v2 with SeaBIOS
mylesgw at gmail.com
Sat Feb 28 17:07:31 CET 2009
> -----Original Message-----
> From: Stefan Reinauer [mailto:stepan at coresystems.de]
> Sent: Friday, February 27, 2009 4:39 PM
> To: Myles Watson
> Cc: Coreboot
> Subject: Re: [coreboot] Coreboot patches for v2 with SeaBIOS
> Myles Watson wrote:
> > On Fri, Feb 27, 2009 at 4:15 PM, Stefan Reinauer <stepan at coresystems.de>
> >> Myles Watson wrote:
> >>> Does this work for you with 4G of RAM?
> >> My boards don't support that much.. :-(
> > No problem.
> >> Have to try on the AMD boards
> >> some time. But I guess if the chipset supports more than 4G you'd have
> >> to put the high_table_base to the top of low memory (default would be
> >> below 3G I guess) There's no structural problem that would disallow
> >> using the mechanism with any amount of RAM.
> > It works fine for me with boosted memory. It just doesn't work when
> > the RAM stays low. Maybe I'm hitting some corner case for a 32-bit OS
> > that doesn't want to boost the RAM outside the addressable space.
> What's boosted memory?
Boosted memory is when the k8 maps its memory around the PCI space. When
you make a hole the memory that gets moved up is boosted.
> You must, under any circumstance, keep the high_table_area in the lower
> 4G and you must make sure no PCI devices (or other onboard stuff) are
> where you'd expect memory.
So as long as the memory hole is larger than the PCI space it should be
fine. If I'm losing memory because it conflicts with PCI space, I'll lose
the tables. That makes sense.
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