[coreboot] Coreboot patches for v2 with SeaBIOS

Marc Jones marcj303 at gmail.com
Fri Feb 27 22:25:24 CET 2009

On Fri, Feb 27, 2009 at 2:10 PM, Myles Watson <mylesgw at gmail.com> wrote:
> On Fri, Feb 27, 2009 at 1:10 PM, Marc Jones <marcj303 at gmail.com> wrote:
>> On Fri, Feb 27, 2009 at 12:40 PM, Myles Watson <mylesgw at gmail.com> wrote:
>>>> -----Original Message-----
>>>> From: Marc Jones [mailto:marcj303 at gmail.com]
>>>> Sent: Friday, February 27, 2009 10:51 AM
>>>> To: Myles Watson
>>>> Cc: Stefan Reinauer; Coreboot
>>>> Subject: Re: [coreboot] Coreboot patches for v2 with SeaBIOS
>>>> On Fri, Feb 27, 2009 at 10:42 AM, Myles Watson <mylesgw at gmail.com> wrote:
>>>> > Does this work for you with 4G of RAM?  I don't have a Kontron board,
>>>> > but I copied the implementation to the amdk8 northbridge code.  It
>>>> > works for me when I have the RAM "boosted" and it works when I boot
>>>> > with less than 4G, but if I boot with 4G it tries to put the high
>>>> > tables in the PCI decode space since they overlap.
>>>> >
>>>> > Besides that the patch is working well for me, and I'd like to see it
>>>> merged.
>>>> >
>>>> > If it works in the 4G case and I just didn't implement it right for K8:
>>>> >
>>>> > Acked-by: Myles Watson <mylesgw at gmail.com>
>>>> >
>>>> Do you have an off by 1 problem? That would cause the problem @ 4GB as
>>>> you described.
>>> I'm confused ( again :) )
>>> I'm not sure where the off by one problem would be.
>>> I thought the problem was that when you have the top of RAM at 0x100000000
>>> and then subtract some small number from it you end up at 0xffff0000, which
>>> isn't where you should be accessing normal RAM, or reserving it for ACPI.
>> I guess I didn't understand what you were saying. I assumed it was a
>> problem with a size calculation at 4GB. If you have 4GB of memory it
>> should hoist (boost) some portion of it. 512MB or 1GB typically. Is
>> there a bug in the memory hoist code? Can you check what the tomk is
>> with 4GB
> Sorry that took a while.  Here are snippets of the output (full output attached)
> //4 GB getting cleared:
> Setting up local apic... apic_id: 0x00 done.
> Clearing memory 2048K - 4194304K:
> --------------------------------------------------------------- done
> CPU #0 initialized
> ...
> //This is from northbridge.c where I grabbed the space for the high tables:
> 0: mmio_basek=003e0000, basek=003e0000, limitk=00400000

It looks like CONFIG_HW_MEM_HOLE_SIZEK might not be set. I don't think
that you are getting any memory hoisted.


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