[coreboot] Problems porting H8dmr_fam10 to H8qme-2+

Knut Kujat knuku at gap.upv.es
Mon Dec 21 17:15:40 CET 2009

Myles Watson escribió:
> On Mon, Dec 21, 2009 at 3:27 AM, Knut Kujat <knuku at gap.upv.es
> <mailto:knuku at gap.upv.es>> wrote:
>     but I haven't changed anything but inserting some printk_spew into
>     "void dev_initialize(void)" to see where exactly jumps the
>     exception out.
> Did you try increasing the stack size?  When you inserted the printk
> statements, were there any warnings about format strings not matching
> the number of arguments?  Have you tried disabling the siblings yet?
> Thanks,
> Myles  


yes increasing stack size helped with the printks. And yes I tried to
disable siblings by adding uses CONFIG_LOGICAL_PROCESSORS and default
CONFIG_LOGICAL_PROCESSORS=0 to the Options.lb file but it complains at
building time that this options is unkown so I uses LOGICAL_CPUS instead
(is it the same?) without results.

CPU model: Quad-Core AMD Opteron(tm) Processor 8350
Setting up local apic...siblings = 03,  apic_id: 0x09 done.
CPU #14 initialized
CPU model: Quad-Core AMD Opteron(tm) Processor 8350
Waiting for 1 CPUS to stop
siblings = 03, CPU #9 initialized
All AP CPUs stopped
*** Debug: After init(dev);
PCI: 00:18.0 init
*** Debug: After init(dev);
PCI: 00:02.0 init
Unexpected Exception: 6 @ 10:00207fbd - Halting
Code: 0 eflags: 00010013
eax: 00226358 ebx: 00226358 ecx: 0021ea74 edx: 00000001
edi: 0021ea74 esi: 00000001 ebp: 0023fff4 esp: 0023ff50

Now I know that the the exception comes up in the corresponding
init(dev) for the PCI: 00:02.0 device. So I disabled PCI 2.0 in the
device tree and it just doesn't has any effect even it tells me that PCI
2.0 enabled 0 at boot times, it stucks at the same place.

Knut Kujat

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