[coreboot] [v2] r4236 - in trunk/coreboot-v2/src/mainboard: amd/db800 amd/norwich artecgroup/dbe61 digitallogic/msm800sev iei/pcisa-lx-800-r10 lippert/roadrunner-lx lippert/spacerunner-lx pcengines/alix1c tyan/s2735
svn at coreboot.org
svn at coreboot.org
Thu Apr 30 12:16:40 CEST 2009
Author: stepan
Date: 2009-04-30 12:16:39 +0200 (Thu, 30 Apr 2009)
New Revision: 4236
Modified:
trunk/coreboot-v2/src/mainboard/amd/db800/Options.lb
trunk/coreboot-v2/src/mainboard/amd/norwich/Options.lb
trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Options.lb
trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Options.lb
trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Options.lb
trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Options.lb
trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Options.lb
trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Options.lb
trunk/coreboot-v2/src/mainboard/tyan/s2735/Options.lb
Log:
Add "printk" support to all CAR targets
Signed-off-by: Stefan Reinauer <stepan at coresystems.de>
Acked-by: Ronald G. Minnich <rminnich at gmail.com>
Modified: trunk/coreboot-v2/src/mainboard/amd/db800/Options.lb
===================================================================
--- trunk/coreboot-v2/src/mainboard/amd/db800/Options.lb 2009-04-30 10:14:22 UTC (rev 4235)
+++ trunk/coreboot-v2/src/mainboard/amd/db800/Options.lb 2009-04-30 10:16:39 UTC (rev 4236)
@@ -49,6 +49,7 @@
uses USE_DCACHE_RAM
uses DCACHE_RAM_BASE
uses DCACHE_RAM_SIZE
+uses CONFIG_USE_PRINTK_IN_CAR
uses PIRQ_ROUTE
## ROM_SIZE is the size of boot ROM that this board will use.
@@ -108,6 +109,7 @@
default USE_DCACHE_RAM=1
default DCACHE_RAM_BASE=0xc8000
default DCACHE_RAM_SIZE=0x08000
+default CONFIG_USE_PRINTK_IN_CAR=1
##
## Use a small 8K stack
Modified: trunk/coreboot-v2/src/mainboard/amd/norwich/Options.lb
===================================================================
--- trunk/coreboot-v2/src/mainboard/amd/norwich/Options.lb 2009-04-30 10:14:22 UTC (rev 4235)
+++ trunk/coreboot-v2/src/mainboard/amd/norwich/Options.lb 2009-04-30 10:16:39 UTC (rev 4236)
@@ -49,6 +49,7 @@
uses USE_DCACHE_RAM
uses DCACHE_RAM_BASE
uses DCACHE_RAM_SIZE
+uses CONFIG_USE_PRINTK_IN_CAR
uses PIRQ_ROUTE
## ROM_SIZE is the size of boot ROM that this board will use.
@@ -108,6 +109,7 @@
default USE_DCACHE_RAM=1
default DCACHE_RAM_BASE=0xc8000
default DCACHE_RAM_SIZE=0x08000
+default CONFIG_USE_PRINTK_IN_CAR=1
##
## Use a small 8K stack
Modified: trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Options.lb
===================================================================
--- trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Options.lb 2009-04-30 10:14:22 UTC (rev 4235)
+++ trunk/coreboot-v2/src/mainboard/artecgroup/dbe61/Options.lb 2009-04-30 10:16:39 UTC (rev 4236)
@@ -49,6 +49,7 @@
uses USE_DCACHE_RAM
uses DCACHE_RAM_BASE
uses DCACHE_RAM_SIZE
+uses CONFIG_USE_PRINTK_IN_CAR
uses PIRQ_ROUTE
## ROM_SIZE is the size of boot ROM that this board will use.
@@ -108,6 +109,7 @@
default USE_DCACHE_RAM=1
default DCACHE_RAM_BASE=0xc8000
default DCACHE_RAM_SIZE=0x08000
+default CONFIG_USE_PRINTK_IN_CAR=1
##
## Use a small 8K stack
Modified: trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Options.lb
===================================================================
--- trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Options.lb 2009-04-30 10:14:22 UTC (rev 4235)
+++ trunk/coreboot-v2/src/mainboard/digitallogic/msm800sev/Options.lb 2009-04-30 10:16:39 UTC (rev 4236)
@@ -49,6 +49,7 @@
uses USE_DCACHE_RAM
uses DCACHE_RAM_BASE
uses DCACHE_RAM_SIZE
+uses CONFIG_USE_PRINTK_IN_CAR
uses PIRQ_ROUTE
## ROM_SIZE is the size of boot ROM that this board will use.
@@ -108,6 +109,7 @@
default USE_DCACHE_RAM=1
default DCACHE_RAM_BASE=0xc8000
default DCACHE_RAM_SIZE=0x08000
+default CONFIG_USE_PRINTK_IN_CAR=1
##
## Use a small 8K stack
Modified: trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Options.lb
===================================================================
--- trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Options.lb 2009-04-30 10:14:22 UTC (rev 4235)
+++ trunk/coreboot-v2/src/mainboard/iei/pcisa-lx-800-r10/Options.lb 2009-04-30 10:16:39 UTC (rev 4236)
@@ -69,6 +69,7 @@
uses USE_DCACHE_RAM
uses DCACHE_RAM_BASE
uses DCACHE_RAM_SIZE
+uses CONFIG_USE_PRINTK_IN_CAR
uses PIRQ_ROUTE
default ROM_SIZE = 256 * 1024
@@ -88,6 +89,7 @@
default USE_DCACHE_RAM = 1
default DCACHE_RAM_BASE = 0xc8000
default DCACHE_RAM_SIZE = 32 * 1024
+default CONFIG_USE_PRINTK_IN_CAR=1
default STACK_SIZE = 8 * 1024
default HEAP_SIZE = 16 * 1024
# default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
Modified: trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Options.lb
===================================================================
--- trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Options.lb 2009-04-30 10:14:22 UTC (rev 4235)
+++ trunk/coreboot-v2/src/mainboard/lippert/roadrunner-lx/Options.lb 2009-04-30 10:16:39 UTC (rev 4236)
@@ -78,6 +78,7 @@
uses USE_DCACHE_RAM
uses DCACHE_RAM_BASE
uses DCACHE_RAM_SIZE
+uses CONFIG_USE_PRINTK_IN_CAR
uses PIRQ_ROUTE
## ROM_SIZE is the size of boot ROM that this board will use.
@@ -136,6 +137,7 @@
default USE_DCACHE_RAM = 1
default DCACHE_RAM_BASE = 0xc8000
default DCACHE_RAM_SIZE = 0x08000
+default CONFIG_USE_PRINTK_IN_CAR=1
##
## Use a small 8K stack
Modified: trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Options.lb
===================================================================
--- trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Options.lb 2009-04-30 10:14:22 UTC (rev 4235)
+++ trunk/coreboot-v2/src/mainboard/lippert/spacerunner-lx/Options.lb 2009-04-30 10:16:39 UTC (rev 4236)
@@ -78,6 +78,7 @@
uses USE_DCACHE_RAM
uses DCACHE_RAM_BASE
uses DCACHE_RAM_SIZE
+uses CONFIG_USE_PRINTK_IN_CAR
uses PIRQ_ROUTE
## ROM_SIZE is the size of boot ROM that this board will use.
@@ -136,6 +137,7 @@
default USE_DCACHE_RAM = 1
default DCACHE_RAM_BASE = 0xc8000
default DCACHE_RAM_SIZE = 0x08000
+default CONFIG_USE_PRINTK_IN_CAR=1
##
## Use a small 8K stack
Modified: trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Options.lb
===================================================================
--- trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Options.lb 2009-04-30 10:14:22 UTC (rev 4235)
+++ trunk/coreboot-v2/src/mainboard/pcengines/alix1c/Options.lb 2009-04-30 10:16:39 UTC (rev 4236)
@@ -69,6 +69,7 @@
uses USE_DCACHE_RAM
uses DCACHE_RAM_BASE
uses DCACHE_RAM_SIZE
+uses CONFIG_USE_PRINTK_IN_CAR
uses PIRQ_ROUTE
## ROM_SIZE is the size of boot ROM that this board will use.
@@ -126,6 +127,7 @@
default USE_DCACHE_RAM=1
default DCACHE_RAM_BASE=0xc8000
default DCACHE_RAM_SIZE=0x08000
+default CONFIG_USE_PRINTK_IN_CAR=1
##
## Use a small 8K stack
Modified: trunk/coreboot-v2/src/mainboard/tyan/s2735/Options.lb
===================================================================
--- trunk/coreboot-v2/src/mainboard/tyan/s2735/Options.lb 2009-04-30 10:14:22 UTC (rev 4235)
+++ trunk/coreboot-v2/src/mainboard/tyan/s2735/Options.lb 2009-04-30 10:16:39 UTC (rev 4236)
@@ -62,7 +62,7 @@
uses USE_DCACHE_RAM
uses DCACHE_RAM_BASE
uses DCACHE_RAM_SIZE
-uses CONFIG_USE_INIT
+uses CONFIG_USE_PRINTK_IN_CAR
## ROM_SIZE is the size of boot ROM that this board will use.
#512K bytes
@@ -145,7 +145,7 @@
#default DCACHE_RAM_BASE=0xF2000000
default DCACHE_RAM_BASE=0xcf000
default DCACHE_RAM_SIZE=0x1000
-#default CONFIG_USE_INIT=1
+default CONFIG_USE_PRINTK_IN_CAR=1
##
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