[coreboot] [v2] r4217 - trunk/coreboot-v2/src/cpu/amd/car

svn at coreboot.org svn at coreboot.org
Mon Apr 27 18:08:26 CEST 2009


Author: myles
Date: 2009-04-27 18:08:26 +0200 (Mon, 27 Apr 2009)
New Revision: 4217

Modified:
   trunk/coreboot-v2/src/cpu/amd/car/clear_init_ram.c
Log:
Revert 4099 patch that causes an ECC error.  Memory has to be written while ECC
error checking is disabled.  The purpose of the patch was to preserve memory
used by ACPI resume code.  One possible solution is to read that memory and
write it back while ECC error-checking is disabled. 

Signed-off-by: Myles Watson <mylesgw at gmail.com>
Acked-by: Myles Watson <mylesgw at gmail.com>


Modified: trunk/coreboot-v2/src/cpu/amd/car/clear_init_ram.c
===================================================================
--- trunk/coreboot-v2/src/cpu/amd/car/clear_init_ram.c	2009-04-26 19:50:53 UTC (rev 4216)
+++ trunk/coreboot-v2/src/cpu/amd/car/clear_init_ram.c	2009-04-27 16:08:26 UTC (rev 4217)
@@ -6,7 +6,8 @@
 	// gcc 3.4.5 will inline the copy_and_run and clear_init_ram in post_cache_as_ram
 	// will reuse %edi as 0 from clear_memory for copy_and_run part, actually it is increased already
 	// so noline clear_init_ram
-        clear_memory( _RAMBASE,  (CONFIG_LB_MEM_TOPK << 10) -  _RAMBASE - DCACHE_RAM_SIZE);
+        clear_memory(0,  ((CONFIG_LB_MEM_TOPK<<10) - DCACHE_RAM_SIZE));
+
 }
 
 /* be warned, this file will be used by core other than core 0/node 0 or core0/node0 when cpu_reset*/





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