[coreboot] build service results for r4177

coreboot information info at coresystems.de
Wed Apr 22 16:26:47 CEST 2009

Dear coreboot readers!

This is the automatic build system of coreboot.

The developer "hailfinger" checked in revision 4177 to
the coreboot repository. This caused the following 

Change Log:
All "unknown xy SPI chip" entries claim to have status UNTESTED for
probe/read/erase/write. That is incorrect.

A bit of confusion comes from how the #defines are named. We call them
TEST_BAD_*, but the message printed by flashrom says:
"This flash part has status NOT WORKING for operations:"

Something that is unimplemented is definitely not working.

Neither of the chip entries mentioned above has erase or write functions
implemented, so erase and write are not working.
Since their size is unknown, we can't read them in. That means read is
not working as well.
Probing is a different matter. If a chip-specific probe function had
matched, we wouldn't have to handle the chip with the "unknown xy SPI
chip" fallback. I'm tempted to call that "not working" as well, but I'm
open to discussion on this point.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Uwe Hermann <uwe at hermann-uwe.de>

Build Log:
Compilation of msi:ms9282 is still broken
See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=4177&device=ms9282&vendor=msi&num=2

If something broke during this checkin please be a pain 
in hailfinger's neck until the issue is fixed.

If this issue is not fixed within 24h the revision should 
be backed out.

   Best regards,
     coreboot automatic build system

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