[coreboot] [PATCH] flush CPU queue when PE set 0

[Rudolf Marek]

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Hello

Following patch flushes the instruction queue when we set PE=0. This is normally
done by FAR JMP, but here it is more tricky because we run at EIP>1MB. Many
thanks to Marc and Kevin to tell me how to fix it

The trick is to use 0x66 prefix (done with ljmpl) it will allow to jump in real
mode to any EIP addresses ;)

Signed-off-by: Rudolf Marek <r.marek at assembler.cz>

Rudolf

===================================================================
- --- arch/i386/boot/wakeup.S	(revision 4106)
+++ arch/i386/boot/wakeup.S	(working copy)
@@ -45,6 +45,8 @@
 	movl	%cr0, %eax
 	andb	$0xfe,%al
 	movl	%eax, %cr0
+	ljmpl $0x0, $cpu_flushed
+cpu_flushed:
 	movw	$0x0, %ax
 	movw	%ax, %ds
 	movw	%ax, %es
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.9 (GNU/Linux)
Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org

iEYEARECAAYFAknjtyIACgkQ3J9wPJqZRNUugwCguIMboaTCW8eUz+JI2RcOanNC
zA4An0iflgt3O/3YcJ7hcXBqHUsMSTjZ
=Ad2w
-----END PGP SIGNATURE-----