[coreboot] flashrom fails to write/erase on VIA VT8237

vinuxesgmail vinuxes at gmail.com
Mon Apr 6 08:37:20 CEST 2009


Hello [again] Peter,
    Could u derives anything from the output that i have sent? Awaiting 
reply!

Rgds,
Vinod

vinuxesgmail wrote:
> Hi Peter,
>    Here's the output of all the commands:
>
> stress:/tmp # ./setpci -d 1106:3227 e6.b 88.l
>    00
>    00000401
>
> >> Extract 8-15 bits from long value: 04
>
> stress:/tmp # ./io r044f
>    r0x044f=ff
>
> stress:/tmp # ./flashrom -m "portwell:ppap-2020vl" -r backup.bin
>    Calibrating delay loop... OK.
>    No coreboot table found.
>    Found chipset "VIA VT8237", enabling flash write... OK.
>    Found board "Portwell PPAP-2020VL", enabling flash write... OK.
>    Found chip "SST SST49LF004A/B" (512 KB) at physical address 
> 0xfff80000.
>    Reading flash... done.
>
> stress:/tmp # ./flashrom -m "portwell:ppap-2020vl" -E             
> Calibrating delay loop... OK.
>    No coreboot table found.
>    Found chipset "VIA VT8237", enabling flash write... OK.
>    Found board "Portwell PPAP-2020VL", enabling flash write... OK.
>    Found chip "SST SST49LF004A/B" (512 KB) at physical address 
> 0xfff80000.
>    Erasing flash chip... ERASE FAILED!
>    FAILED!
>    ERROR at 0x00000000: Expected=0xff, Read=0x49
>
> stress:/tmp # ./flashrom -m "portwell:ppap-2020vl" -w backup.bin
>    Calibrating delay loop... OK.
>    No coreboot table found.
>    Found chipset "VIA VT8237", enabling flash write... OK.
>    Found board "Portwell PPAP-2020VL", enabling flash write... OK.
>    Found chip "SST SST49LF004A/B" (512 KB) at physical address 
> 0xfff80000.
>    Flash image seems to be a legacy BIOS. Disabling checks.
>    ERASE FAILED!
>
> stress:/tmp # ./setpci -d 1106:3227 e6.b 88.l
>    00
>    00000401
>
> stress:/tmp # ./io r044f
>    r0x044f=ff
>
> Rgds,
> Vinod
>
> Peter Stuge wrote:
>> Ok. I guess my board enable code doesn't work properly. Maybe you can
>> help me look into the relevant registers manually?
>>
>> Please download http://stuge.se/io.c and compile it using:
>> gcc -O2 -o io io.c
>>
>> Please run:
>> setpci -d 1106:3227 e6.b 88.l
>>
>> The command should print one hexadecimal byte and one hex long.
>> Please save these values.
>>
>> Use bits 8-15 as port bits 8-15 and use 4f as bits 0-7, then please
>> run io:
>> ./io r__4f
>>
>> (Replace __ here with bits 8-15 from the hex long value from setpci.)
>>
>> After this, please run flashrom with the patch. (It will still fail.)
>>
>> Then please run the setpci and io command again, and finally send an
>> email with the output from all commands.
>>
>>
>> Thanks for your help!
>>
>> //Peter
>





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