[coreboot] Remaining ROMCC targets
joe at settoplinux.org
Sat Apr 4 01:06:20 CEST 2009
On Sat, 04 Apr 2009 00:26:19 +0200, Carl-Daniel Hailfinger
<c-d.hailfinger.devel.2006 at gmx.net> wrote:
> On 03.04.2009 20:20, Joseph Smith wrote:
>> On Fri, 03 Apr 2009 19:05:28 +0200, Carl-Daniel Hailfinger wrote:
>>> This is a list of targets using ROMCC together with the CPU type used
>>> for ROMCC.
>> rca/rm4100 p3
>> thomson/ip1000 p3
>> Are my doings. I would love to see them using CAR instead of ROMCC, but
>> wouldn't even know where to start....
> Great. Will a bad reflash hurt you?
No, as long as it doesn't blow the thing up :-0
> What you need to try this one out:
> - a POST card or another way to fetch POST codes.
> - tell me whether POST works by default or you need special setup.
> - a will to try out v3 with some patches
Ok, I have a PCI/Parallel Post Card. The RM4100 doesn't have eithor, the
IP1000 does have a PCI slot so we can use that for testing.
> The idea is to test the v3 intel CAR code which has not been on real
> hardware yet, but it is a much cleaner and more readable implementation
> compared to v2. I'm hoping we don't need chipset specific stuff for POST
> to work.
Not sure, serial output works fine.
> I need info on the cache size of your processor, though. Unreliable CAR
> is not nearly as much fun as reliable CAR.
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