[coreboot] r964 - coreboot-v3/util/x86emu

Jordan Crouse jordan.crouse at amd.com
Wed Oct 29 22:11:54 CET 2008


On 29/10/08 15:00 -0600, Myles Watson wrote:
> > Modified:
> >   coreboot-v3/util/x86emu/vm86.c
> > Log:
> > This patch makes the vm86 call succeed. It
> > 1. moves the run_bios function down so it can call setup_realmode_idt
> > 2. adds the __attribute__((regnum(0))) to biosint because it is called from
> > assembly
> >
> >
> Anybody who wants to test this in SimNOW either needs to unshare pci and
> printk, or remove calls into the ROM while the VGA ROM is running.
> Otherwise when the ROM gets sized, your code disappears.
> 
> Signed-off-by: Myles Watson <mylesgw at gmail.com>

We already have Simnow ifdefs in the code - would those help to make 
the code work out of the box?

Jordan

> Thanks,l
> Myles

> Index: util/x86emu/vm86.c
> ===================================================================
> --- util/x86emu/vm86.c	(revision 964)
> +++ util/x86emu/vm86.c	(working copy)
> @@ -29,6 +29,8 @@
>  #include <string.h>
>  #include <io.h>
>  
> +#define CONFIG_CMD(bdf, where)   (0x80000000 | (bdf) | ((where & 0xff) & ~3) | ((where & 0xf00)<<16) )
> + 
>  /* The address arguments to this function are PHYSICAL ADDRESSES */
>  static void real_mode_switch_call_vga(unsigned long devfn)
>  {
> @@ -418,28 +420,15 @@
>  	cs = cs_ip >> 16;
>  	flags = stackflags;
>  
> -	printk(BIOS_DEBUG, "biosint: INT# 0x%lx\n", intnumber);
> -	printk(BIOS_DEBUG, "biosint: eax 0x%lx ebx 0x%lx ecx 0x%lx edx 0x%lx\n",
> -		      eax, ebx, ecx, edx);
> -	printk(BIOS_DEBUG, "biosint: ebp 0x%lx esp 0x%lx edi 0x%lx esi 0x%lx\n",
> -		     ebp, esp, edi, esi);
> -	printk(BIOS_DEBUG, "biosint:  ip 0x%lx   cs 0x%lx  flags 0x%lx\n",
> -		     ip, cs, flags);
> -
>  	// cases in a good compiler are just as good as your own tables.
>  	switch (intnumber) {
>  	case 0 ... 15:
>  		// These are not BIOS service, but the CPU-generated exceptions
> -		printk(BIOS_INFO, "biosint: Oops, exception %lu\n", intnumber);
>  		if (esp < 0x1000) {
> -			printk(BIOS_DEBUG, "Stack contents: ");
>  			while (esp < 0x1000) {
> -				printk(BIOS_DEBUG, "0x%04x ", *(unsigned short *) esp);
>  				esp += 2;
>  			}
> -			printk(BIOS_DEBUG, "\n");
>  		}
> -		printk(BIOS_DEBUG, "biosint: Bailing out\n");
>  		// "longjmp"
>  		vga_exit();
>  		break;
> @@ -458,8 +447,6 @@
>  				&ebx, &edx, &ecx, &eax, &flags);
>  		break;
>  	default:
> -		printk(BIOS_INFO, "BIOSINT: Unsupport int #0x%lx\n",
> -			    intnumber);
>  		break;
>  	}
>  	if (ret)
> @@ -598,7 +585,6 @@
>  			// devfn is an int, so we mask it off.
>  			busdevfn = (dev->bus->secondary << 8)
>  				| (dev->path.pci.devfn & 0xff);
> -			printk(BIOS_DEBUG, "0x%x: return 0x%x\n", func, busdevfn);
>  			*pebx = busdevfn;
>  			retval = 0;
>  		} else {
> @@ -618,54 +604,74 @@
>  		unsigned short word;
>  		unsigned char byte;
>  		unsigned char reg;
> +		struct bus *pbus;
>  
>  		devfn = *pebx & 0xff;
>  		bus = *pebx >> 8;
>  		reg = *pedi;
>  		dev = dev_find_slot(bus, devfn);
>  		if (! dev) {
> -			printk(BIOS_DEBUG, "0x%x: BAD DEVICE bus %d devfn 0x%x\n", func, bus, devfn);
>  			// idiots. the pcibios guys assumed you'd never pass a bad bus/devfn!
>  			*peax = PCIBIOS_BADREG;
>  			retval = -1;
>  		}
> +		pbus = dev->bus;
> +		while (pbus && pbus->dev && !ops_pci_bus(pbus)) {
> +			pbus = pbus->dev->bus;
> +		}
>  		switch(func) {
>  		case READCONFBYTE:
> -			byte = pci_read_config8(dev, reg);
> +			outl(CONFIG_CMD(PCI_BDEVFN(dev->bus->secondary,
> +						   dev->path.pci.devfn),
> +					reg),
> +				0xCF8);
> +			byte =  inb(0xCFC + (reg & 3));
>  			*pecx = byte;
>  			break;
>  		case READCONFWORD:
> -			word = pci_read_config16(dev, reg);
> +			outl(CONFIG_CMD(PCI_BDEVFN(dev->bus->secondary,
> +						   dev->path.pci.devfn), reg),
> +				0xCF8);
> +			word = inw(0xCFC + (reg & 2));
>  			*pecx = word;
>  			break;
>  		case READCONFDWORD:
> -			dword = pci_read_config32(dev, reg);
> +			outl(CONFIG_CMD(PCI_BDEVFN(dev->bus->secondary,
> +						   dev->path.pci.devfn), reg),
> +				0xCF8);
> +			dword = inl(0xCFC);
>  			*pecx = dword;
>  			break;
>  		case WRITECONFBYTE:
>  			byte = *pecx;
> -			pci_write_config8(dev, reg, byte);
> +			outl(CONFIG_CMD(PCI_BDEVFN(dev->bus->secondary,
> +						   dev->path.pci.devfn), reg),
> +				0xCF8);
> +			outb(byte, 0xCFC + (reg & 3));
>  			break;
>  		case WRITECONFWORD:
>  			word = *pecx;
> -			pci_write_config16(dev, reg, word);
> +			outl(CONFIG_CMD(PCI_BDEVFN(dev->bus->secondary,
> +						   dev->path.pci.devfn), reg),
> +				0xCF8);
> +			outw(word, 0xCFC + (reg & 2));
>  			break;
>  		case WRITECONFDWORD:
>  			dword = *pecx;
> -			pci_write_config32(dev, reg, dword);
> +			outl(CONFIG_CMD(PCI_BDEVFN(dev->bus->secondary,
> +						   dev->path.pci.devfn), reg),
> +				0xCF8);
> +			outl(dword, 0xCFC);
>  			break;
>  		}
>  
>  		if (retval)
>  			retval = PCIBIOS_BADREG;
> -		printk(BIOS_DEBUG, "0x%x: bus %d devfn 0x%x reg 0x%x val 0x%lx\n",
> -			     func, bus, devfn, reg, *pecx);
>  		*peax = 0;
>  		retval = 0;
>  	}
>  	break;
>  	default:
> -		printk(BIOS_ERR, "UNSUPPORTED PCIBIOS FUNCTION 0x%x\n",  func);
>  		break;
>  	}
>  

> --
> coreboot mailing list: coreboot at coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot


-- 
Jordan Crouse
Systems Software Development Engineer 
Advanced Micro Devices, Inc.





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