[coreboot] K8 HT architecture

Marc Jones Marc.Jones at amd.com
Mon Oct 27 21:32:04 CET 2008

Carl-Daniel Hailfinger wrote:

>>>> They don't know (or need to know) what ht links are connecting the cpu
>>>> and what ones go to pci bus.
>>> They need a way to specify settings for any given PCI device. Since most
>>> modern machines have multiple PCI devices with the same vendor/device
>>> ID, we have to be able to identify devices based on their logical path.
>>> For that, we have to model the logical PCI bus/device/tree reasonably
>>> well. I'm trying to do that, but no model seems to fit.
>> I disagree. How would a two devices of the same type require
>> difference initialization? I think that defining where the devices are
>> at build time is wrong. You only need the ID and the functions that
>> device requires.
> The best example I saw was multiple PCI express bridges with the same
> ID, although only some of them were used by physical PCIe slots or
> onboard PCIe devices. Factory BIOSes usually hide the unconnected
> bridges and I'd be happy if we could do the same. AFAICS that requires
> different initialization of devices with the same type.

This is an interesting problem to solve. If the customization is 
something very specific to the platform it is difficult to do in the 
device tree by variables settings. You end calling back to a custom 
function anyway which could know how to set each device any number of 
ways (with or without a dts).

I don't think that the dts is required at build time but both cases are 
handled (variables and custom functions) so I think we should continue 
on this path.


Marc Jones
Senior Firmware Engineer
(970) 226-9684 Office
mailto:Marc.Jones at amd.com

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