[coreboot] K8 HT architecture

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Sat Oct 25 02:05:37 CEST 2008


On 24.10.2008 15:10, ron minnich wrote:
>> +--18.0----(Link n [0,1,2])--+--19.0--(CPU)-(2nd HT link)
>> |     |\                     |            \--(3rd HT link)
>> |     | |                    +--19.1
>> |     | |                    +--19.2
>> |     | |                    +--19.3
>> |     | |
>> |     | \--18.0(second HT link)---(may be empty)
>> |     |
>> |     \----18.0(third HT link)--+--0.0
>> |                           +--1.0
>> |                           \--1.1
>> +--18.1
>> +--18.2
>> +--18.3
>>
>>
>>     
>
> This looks almost right to me. But the routing functions are in F1.
>   

So the HT links are attached to 18.0, but routing control is in 18.1?

> And the link that is used need not be first, it can be link 2 or 3.
> You might want to put the CPU in that picture (I just did)
>   

Thanks.

With Marc's mail, this is getting more complicated. It may be the best
thing to stick with the logical PCI structure of the system, however
that is not clear at all and seems to depend a great deal on the used
firmware.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/





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