[coreboot] committed route dumper code.

Myles Watson mylesgw at gmail.com
Tue Oct 21 19:35:18 CEST 2008


On Mon, Oct 20, 2008 at 9:23 PM, ron minnich <rminnich at gmail.com> wrote:

> This code is now callable from anywhere. Here is output. This call is
> from initram. It looks like the dumper code or the routes are wrong in
> some, not all, cases. I am gone for next week on travel so
> I wanted to give people a look at it.


Thanks.

TODO: mv mainboard.c to stage2.c
> mv util.c to dumproutes.c
>

This patch cleans up the showallroutes utility:
1. fix if->in in comments
2. change width of output for different types
3. make all masks 0x so that it's easy to tell a mask

It also changes the invocations to do function 1 instead of 0.

I think we should consider a name that makes it clear that this is only good
for AMD K8+ processors function 1.  We might need a similar utility for
other
functions later.

Signed-off-by: Myles Watson <mylesgw at gmail.com>


>
> DRAM(40)01000000-00ffffff, ->(1), R, W, 2 nodes, 1
> DRAM(48)01000000-00ffffff, ->(1), R, W, 2 nodes, 1
> DRAM(50)01000000-00ffffff, ->(1), R, W, 2 nodes, 1
> DRAM(58)01000000-00ffffff, ->(1), R, W, 2 nodes, 1
> DRAM(60)00000000-00ffffff, ->(4), , , No interleave, 0
> DRAM(68)00000000-00ffffff, ->(0), R, W, 8 nodes, 0
> DRAM(70)00000000-00ffffff, ->(0), , , No interleave, 0
> DRAM(78)00000000-00ffffff, ->(0), , , No interleave, 0
> MMIO(80)01a00000-1100ffff, ->(0,2), , , CPU disable 0, Lock 0, Non posted 0
> MMIO(88)75060000-0000ffff, ->(2,0), , , CPU disable 0, Lock 0, Non posted 0
> MMIO(90)51040000-3f00ffff, ->(0,0), , , CPU disable 1, Lock 0, Non posted 0
> MMIO(98)00000000-0000ffff, ->(0,0), R, W, CPU disable 0, Lock 0, Non posted
> 0
> MMIO(a0)01c00000-1100ffff, ->(0,1), , , CPU disable 0, Lock 0, Non posted 1
> MMIO(a8)75000000-0000ffff, ->(2,0), , , CPU disable 0, Lock 0, Non posted 0
> MMIO(b0)51040000-0000ffff, ->(0,0), , , CPU disable 1, Lock 0, Non posted 0
> MMIO(b8)00000000-0000ffff, ->(0,0), , , CPU disable 0, Lock 0, Non posted 0
> PCIIO(c0)00001010-00003110, ->(0,1), , ,VGA 0 ISA 0
> PCIIO(c8)00000750-00000000, ->(2,0), , ,VGA 0 ISA 1
> PCIIO(d0)00002510-00000000, ->(0,0), , ,VGA 1 ISA 0
> PCIIO(d8)00000000-00000000, ->(0,0), , ,VGA 0 ISA 0
> CONFIG(e0)00000000-00000000 ->(0,0),  CE 0
> CONFIG(e4)00000000-00000000 ->(0,0),  CE 0
> CONFIG(e8)00000000-00000000 ->(0,0),  CE 0
> CONFIG(ec)00000000-00000000 ->(0,0),  CE 0


Output with patch:
DRAM(40)0000000000-000fffffff, ->(0), R, W, No interleave, 0
DRAM(48)0000000000-0000ffffff, ->(1), , , No interleave, 0
DRAM(50)0000000000-0000ffffff, ->(2), , , No interleave, 0
DRAM(58)0000000000-0000ffffff, ->(3), , , No interleave, 0
DRAM(60)0000000000-0000ffffff, ->(4), , , No interleave, 0
DRAM(68)0000000000-0000ffffff, ->(5), , , No interleave, 0
DRAM(70)0000000000-0000ffffff, ->(6), , , No interleave, 0
DRAM(78)0000000000-0000ffffff, ->(7), , , No interleave, 0
MMIO(80)0000000000-000000ffff, ->(0,0), , , CPU disable 0, Lock 0, Non
posted 0
MMIO(88)0000000000-000000ffff, ->(0,0), , , CPU disable 0, Lock 0, Non
posted 0
MMIO(90)0000000000-000000ffff, ->(0,0), , , CPU disable 0, Lock 0, Non
posted 0
MMIO(98)0000000000-000000ffff, ->(0,0), , , CPU disable 0, Lock 0, Non
posted 0
MMIO(a0)0000000000-000000ffff, ->(0,0), , , CPU disable 0, Lock 0, Non
posted 0
MMIO(a8)0000000000-000000ffff, ->(0,0), , , CPU disable 0, Lock 0, Non
posted 0
MMIO(b0)0000000000-000000ffff, ->(0,0), , , CPU disable 0, Lock 0, Non
posted 0
MMIO(b8)00fc000000-00ffffffff, ->(0,0), R, W, CPU disable 0, Lock 0, Non
posted 0
PCIIO(c0)0000000-1ffffff, ->(0,0), R, W,VGA 0 ISA 0
PCIIO(c8)0000000-0000fff, ->(0,0), , ,VGA 0 ISA 0
PCIIO(d0)0000000-0000fff, ->(0,0), , ,VGA 0 ISA 0
PCIIO(d8)0000000-0000fff, ->(0,0), , ,VGA 0 ISA 0
CONFIG(e0)3f-00 ->(0,0),R W CE 0
CONFIG(e4)00-00 ->(0,0),  CE 0
CONFIG(e8)00-00 ->(0,0),  CE 0
CONFIG(ec)00-00 ->(0,0),  CE 0

Thanks,
Myles
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