[coreboot] V3 ram assignment

[Corey Osgood]

Just a quick question, I'm using the geode as an example:

static void geodelx_pci_domain_set_resources(struct device *dev)
{
    int idx;
    struct device *mc_dev;
    struct northbridge_amd_geodelx_domain_config *nb_dm =
     (struct northbridge_amd_geodelx_domain_config
*)dev->device_configuration;

    printk(BIOS_SPEW, ">> Entering northbridge.c: %s\n", __FUNCTION__);

    mc_dev = dev->link[0].children;
    if (mc_dev) {
        /* Report the memory regions. */
        idx = 10;
        /* 0 .. 640 KB */
        ram_resource(dev, idx++, 0, 640);
        /* 1 MB .. (Systop - 1 MB) (in KB) */
        ram_resource(dev, idx++, 1024,
                 (get_systop(nb_dm) / 1024) - 1024);
    }

    phase4_assign_resources(&dev->link[0]);
}

Does ram_resource() have to be part of the pci domain setup? I know that it
usually is, but the memory controller registers on the cn700 are part of
d0f3, could I do ram_resource with the rest of that device's init?

Thanks,
Corey
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