[coreboot] r3648 - trunk/util/flashrom

[svn at coreboot.org]

Author: hailfinger
Date: 2008-10-10 22:54:41 +0200 (Fri, 10 Oct 2008)
New Revision: 3648

Modified:
   trunk/util/flashrom/chipset_enable.c
Log:
Add ICH10 support to flashrom.

The ICH9 and ICH10 data sheets are identical regarding FWH/SPI flash
interfaces, so this just adds the required PCI IDs.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Peter Stuge <peter at stuge.se>


Modified: trunk/util/flashrom/chipset_enable.c
===================================================================
--- trunk/util/flashrom/chipset_enable.c	2008-10-10 20:43:17 UTC (rev 3647)
+++ trunk/util/flashrom/chipset_enable.c	2008-10-10 20:54:41 UTC (rev 3648)
@@ -274,6 +274,7 @@
 		spibar_offset = 0x3020;
 		break;
 	case 9:
+	case 10:
 	default: /* Future version might behave the same */
 		flashbus = BUS_TYPE_ICH9_SPI;
 		spibar_offset = 0x3800;
@@ -357,6 +358,11 @@
 	return enable_flash_ich_dc_spi(dev, name, 9);
 }
 
+static int enable_flash_ich10(struct pci_dev *dev, const char *name)
+{
+	return enable_flash_ich_dc_spi(dev, name, 10);
+}
+
 static int enable_flash_vt823x(struct pci_dev *dev, const char *name)
 {
 	uint8_t val;
@@ -723,6 +729,10 @@
 	{0x8086, 0x2917, "Intel ICH9M-E",	enable_flash_ich9},
 	{0x8086, 0x2918, "Intel ICH9",		enable_flash_ich9},
 	{0x8086, 0x2919, "Intel ICH9M",		enable_flash_ich9},
+	{0x8086, 0x3a14, "Intel ICH10DO",	enable_flash_ich10},
+	{0x8086, 0x3a16, "Intel ICH10R",	enable_flash_ich10},
+	{0x8086, 0x3a18, "Intel ICH10",		enable_flash_ich10},
+	{0x8086, 0x3a1a, "Intel ICH10D",	enable_flash_ich10},
 	{0x1106, 0x8231, "VIA VT8231",		enable_flash_vt823x},
 	{0x1106, 0x3177, "VIA VT8235",		enable_flash_vt823x},
 	{0x1106, 0x3227, "VIA VT8237",		enable_flash_vt823x},