[coreboot] r1059 - coreboot-v3/arch/x86/intel/core2

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Wed Nov 26 15:49:34 CET 2008

On 26.11.2008 10:17, svn at coreboot.org wrote:
> Author: stepan
> Date: 2008-11-26 10:17:29 +0100 (Wed, 26 Nov 2008)
> New Revision: 1059
> Modified:
>    coreboot-v3/arch/x86/intel/core2/stage0.S
> Log:
> back out until this issue is really fixed.
> Signed-off-by: Stefan Reinauer <stepan at coresystems.de>
> Acked-by: Stefan Reinauer <stepan at coresystems.de>

OK, and what failed this time? BIST? Last POST code?
I want to fix this, but the information I have available is rather
scarce. It is obvious that the existing code is broken and works only by
accident for some platforms. AFAICS we can even scribble randomly over
memory with the current Core2Duo CAR.

I'll send a patch to re-add the comments. If the comments break
anything, either the tests are flaky or your gcc/gas is totally broken.



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