[coreboot] flashrom: simplify ich spi read/write operations

FENG Yu Ning fengyuning1984 at gmail.com
Wed Nov 26 09:43:24 CET 2008


Sorry for the unfinished mail.

1. We need a "random-write-or-page-write" field in the flashchip
struct, to indicate different types of chips. Again, a good name is
needed. The erase-write function would have an if-branch to choose
different writing mechanisms.

erase-write (...) {
  isVIA
  if random_write {
    ...
  } else { /* page write */
    ...
  }
}

2. For page-write chips, we need page size and
delay-time-between-page-write info in the flashchip struct. The
writing mechanism will look like:

loop {
  erase
  loop{ /* we need to fill the whole page
           whose size is larger than
           SPID's 64 bytes. */
    write_chunk
  }
  delay
}

3. For random-write chips, we will use the simplified writing mechanism.

yu ning




More information about the coreboot mailing list