[coreboot] How to find out "page size" of a flash chip?

[FENG Yu Ning]

On 11/19/08, Peter Stuge <peter at stuge.se> wrote:
> The page_size member is considered an eraseblock size by the code.

Makes me clear. The naming is somewhat misleading, however.

> As you may have found, the code is pretty ugly overall.

The code does not look good.

1.Here,

int ich_spi_write(struct flashchip *flash, uint8_t * buf)
{
	int i, j, rc = 0;
	int total_size = flash->total_size * 1024;
	int page_size = flash->page_size;
	int erase_size = 64 * 1024;

the erase_size is "hard-wired" to 64k bytes.

2. Later in the same function, spi_block_erase_d8 is called to erase a
block(If we are going to use block erase, I agree with the FIXME
there). In fact, the erase-write loop covers the whole chip, I think
doing chip-erase outside is better. page_size is not used as erase
block size. It is used only as a write loop counter.

The ich spi read/write functions need to be written in the future.

> In the case
> of ichspi, read_page and write_page simply assume that it is possible
> to read or write all of page_size bytes in a loop.

If there is no other design issues, its only function here is just
confusing people.

> Other SPI "bus" drivers work differently, but page_size is always
> assumed to describe an eraseblock size.

Thanks very much for the clear explanation.

yu ning