[coreboot] r3758 - trunk/util/flashrom

[svn at coreboot.org]

Author: hailfinger
Date: 2008-11-18 01:43:14 +0100 (Tue, 18 Nov 2008)
New Revision: 3758

Modified:
   trunk/util/flashrom/ichspi.c
Log:
Currently flashrom assumes every vendor BIOS shares our view about which
SPI opcodes should be placed in which location. Move to a less
optimistic implementation and actually use the generic SPI read
functions. They're useful for abstracting exactly this stuff and that
makes them the preferred choice.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Stefan Reinauer <stepan at coresystems.de>


Modified: trunk/util/flashrom/ichspi.c
===================================================================
--- trunk/util/flashrom/ichspi.c	2008-11-18 00:41:02 UTC (rev 3757)
+++ trunk/util/flashrom/ichspi.c	2008-11-18 00:43:14 UTC (rev 3758)
@@ -300,7 +300,7 @@
 	if (op.atomic != 0) {
 		/* Select atomic command */
 		temp16 |= SPIC_ACS;
-		/* Selct prefix opcode */
+		/* Select prefix opcode */
 		if ((op.atomic - 1) == 1) {
 			/*Select prefix opcode 2 */
 			temp16 |= SPIC_SPOP;
@@ -491,19 +491,15 @@
 	for (a = 0; a < page_size; a += maxdata) {
 		if (remaining < maxdata) {
 
-			if (run_opcode
-			    (curopcodes->opcode[1],
-			     offset + (page_size - remaining), remaining,
-			     &buf[page_size - remaining]) != 0) {
+			if (spi_nbyte_read(offset + (page_size - remaining),
+				&buf[page_size - remaining], remaining)) {
 				printf_debug("Error reading");
 				return 1;
 			}
 			remaining = 0;
 		} else {
-			if (run_opcode
-			    (curopcodes->opcode[1],
-			     offset + (page_size - remaining), maxdata,
-			     &buf[page_size - remaining]) != 0) {
+			if (spi_nbyte_read(offset + (page_size - remaining),
+				&buf[page_size - remaining], maxdata)) {
 				printf_debug("Error reading");
 				return 1;
 			}