[coreboot] r1034 - coreboot-v3/superio/winbond/w83627hf

[svn at coreboot.org]

Author: uwe
Date: 2008-11-16 14:45:53 +0100 (Sun, 16 Nov 2008)
New Revision: 1034

Modified:
   coreboot-v3/superio/winbond/w83627hf/dts
Log:
Fix some incorrect entries in superio/winbond/w83627hf/dts.

The hardware monitor defaults as per datasheet are 0x0000 / 0, but on
hardware that uses this functionality it seems to be 0x290 / 5 often,
thus use those values in the dts.

Signed-off-by: Uwe Hermann <uwe at hermann-uwe.de>
Acked-by: Myles Watson <mylesgw at gmail.com>



Modified: coreboot-v3/superio/winbond/w83627hf/dts
===================================================================
--- coreboot-v3/superio/winbond/w83627hf/dts	2008-11-16 13:41:15 UTC (rev 1033)
+++ coreboot-v3/superio/winbond/w83627hf/dts	2008-11-16 13:45:53 UTC (rev 1034)
@@ -20,18 +20,20 @@
 
 {
 	device_operations = "w83627hf_ops";
+
 	/* To override any of these, put the over-ride in mainboard dts. */
 
 	/* Floppy */
 	floppyenable = "0";
 	floppyio = "0x3f0";
-	floppyirq = "0x60";
-	floppydrq = "0x02";
+	floppyirq = "6";
+	floppydrq = "2";
 
 	/* Parallel port */
 	ppenable = "0";
 	ppio = "0x378";
 	ppirq = "7";
+	ppdrq = "4";
 
 	/* COM1 */
 	com1enable = "0";
@@ -43,23 +45,23 @@
 	com2io = "0x2f8";
 	com2irq = "3";
 
-	/* Keyboard */
+	/* PS/2 keyboard + PS/2 mouse */
 	kbenable = "0";
 	kbio = "0x60";
-	kbio2 = "0x62";
+	kbio2 = "0x64";
 	kbirq = "1";
 	kbirq2 = "12";
 
 	/* Consumer IR */
 	cirenable = "0";
 
-	/* Game port */
+	/* Game port, MIDI port, GPIO1 */
 	gameenable = "0";
-	gameio = "0x220";
-	gameio2 = "0x400";
+	gameio = "0x201";
+	gameio2 = "0x330";
 	gameirq = "9";
 
-	/* GPIO2 */
+	/* GPIO2, watchdog timer */
 	gpio2enable = "0";
 
 	/* GPIO3 */