[coreboot] [PATCH] v3: Fix Gigabyte M57SLI compilation

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Sun Nov 16 14:16:04 CET 2008


Gigabyte M57SLI compilation is broken in v3. With a small makefile and
dts change, the target compiles again.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: corebootv3-m57sli_compilefix/mainboard/gigabyte/m57sli/dts
===================================================================
--- corebootv3-m57sli_compilefix/mainboard/gigabyte/m57sli/dts	(Revision 1032)
+++ corebootv3-m57sli_compilefix/mainboard/gigabyte/m57sli/dts	(Arbeitskopie)
@@ -55,5 +55,9 @@
 				/config/("southbridge/nvidia/mcp55/sata.dts");
 			};
 		};
+		ioport at 2e {
+			/config/("superio/ite/it8716f/dts");
+			com1enable = "1";
+		};
 	};
 };
Index: corebootv3-m57sli_compilefix/mainboard/gigabyte/m57sli/Makefile
===================================================================
--- corebootv3-m57sli_compilefix/mainboard/gigabyte/m57sli/Makefile	(Revision 1032)
+++ corebootv3-m57sli_compilefix/mainboard/gigabyte/m57sli/Makefile	(Arbeitskopie)
@@ -21,6 +21,7 @@
 
 STAGE0_MAINBOARD_SRC := $(src)/lib/clog2.c \
 			$(src)/mainboard/$(MAINBOARDDIR)/stage1.c \
+			$(src)/arch/x86/resourcemap.c \
 			$(src)/arch/x86/stage1_mtrr.c \
 			$(src)/arch/x86/amd/model_fxx/dualcore_id.c \
 			$(src)/arch/x86/amd/model_fxx/stage1.c \


-- 
http://www.hailfinger.org/





More information about the coreboot mailing list