[coreboot] r1026 - in coreboot-v3: mainboard/kontron/986lcd-m southbridge/intel/i82801gx

Corey Osgood corey.osgood at gmail.com
Sat Nov 15 07:02:57 CET 2008

On Sat, Nov 15, 2008 at 12:20 AM, ron minnich <rminnich at gmail.com> wrote:

> On Fri, Nov 14, 2008 at 8:40 PM, Corey Osgood <corey.osgood at gmail.com>
> wrote:
> > Should we just succumb to the way a factory BIOS does it?
> >  Initialize a
> > minimal amount of ram with the default chipset timings in initram, then
> do a
> > full blown ram init once we've got some real memory to work off of? Or
> would
> > that not solve the problem?
> That has not been a workable dram path for some time. For ddr and
> later, there are no safe default timings, or so I am told.
> ron

Sure there are, CN700 in v2 uses a safe (read: slowest possible) set of
timings that seems to work on all the memory I've thrown at it. AFAIK DDR2
doesn't like running too much slower then spec, but it can handle quite a

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