[coreboot] ACPI S3

Marc Jones marcj303 at yahoo.com
Wed Nov 12 22:32:52 CET 2008

----- Original Message ----

> From: Rudolf Marek <r.marek at assembler.cz>
> To: "Feng, Libo" <Libo.Feng at amd.com>
> Cc: coreboot at coreboot.org
> Sent: Wednesday, November 12, 2008 1:38:39 PM
> Subject: Re: [coreboot] ACPI S3
> Feng, Libo napsal(a):
> > 
> > Hi, all,
> > 
> > I am trying to implement the ACPI S3 on coreboot. I have some questions:
> Hi, I have posted some experimental version year ago. It is quite tricky to get 
> it working correctly because coreboot overwrittes lot of memory.
> Here is the patch:
> http://www.coreboot.org/pipermail/coreboot/2008-January/028787.html
> Worked for K8T890 and K8 DDR revE
> Here is described in the steps what needs to be done:
> http://www.coreboot.org/pipermail/coreboot/2008-September/038539.html
> > 
> > 1. Where is the proper place to check the sleep type in the power register? 
> Now I check it just prior to disabling the cache as RAM, for not ruining the 
> RAM.
> Problem is that you need to setup again some devices which are not setup by OS. 
> Like memory controller DDR and chipset low level stuff.
> ACPI allows to wakeup in state like fresh boot, therefore I just let coreboot 
> run again and then jump not to payload but to previously saved waking vector.
> Problem only is not to overwrite the memory. I solved that by instructing the 
> kernel not to use the low memory at all. Except one page for the trampoline code 
> from your mail.

Did you do that with e820 ( via the coreboot table)? I think you could reserve the stack area with E820. That would at least give back some of the memory.

It also looks like we need a s3 aware CAR 

> > 
> > 2. How to jump into the wakeup_start in x86_64/kernel/acpi/wakeup.S? The code 
> is in real mode, how does coreboot jump from the protected mode to the entry? In 
> my case, the wakeup_start points to the physical address 0x2000, from there some 
> real mode code reside. How to jump to the code. 
> There is reset vector in some DSDT table. Check mine original patch.

The real vm86 think code in either real_mode_switch_call_* should be a good example.

> For which chipset/processor are you planning that?

Libo and Co. are working on  the dbm690t platform  K8 revf/g and rs690/sb600.


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