[coreboot] via epia-cn and v3

ron minnich rminnich at gmail.com
Sat Nov 1 02:19:12 CET 2008


On Fri, Oct 31, 2008 at 6:13 PM, Carl-Daniel Hailfinger
<c-d.hailfinger.devel.2006 at gmx.net> wrote:

> Yes, ROM may not be cached. My primary goal was to get this to work at all.

ROM should now be cached.

>
> And the reset issue is currently my highest priority problem to resolve.
> I believe I may have to disappoint you and change the memcpy to an
> open-coded copy in asm.


it happens. There are times when gcc is the wrong way to go :-)

ron




More information about the coreboot mailing list