[coreboot] Enabling 4MB window in LPC adressing space

Mart Raudsepp mart.raudsepp at artecdesign.ee
Fri May 23 17:57:19 CEST 2008

Ühel kenal päeval, R, 2008-05-23 kell 17:45, kirjutas llandre:
> Hi all,


> I'm trying to boot a linux kernel image. It is about 2 MBytes. I used 
> buildrom to generate the 4MB binary image (coreboot+linux) that I 
> downloaded to Artec LCP Dongle flash.
> IIUC, to read the payload it is necessary to enable the 4MB window in 
> LCP addressing space. To do that I modified cache_as_ram_main function 
> in order to write 0xF4 to I/O port 0x88:
> void cache_as_ram_main(void)
> {
> 	outb(0xF4, 0x88);
> ...
> However it does not work:
> a) white LED on dongle is still off

See http://coreboot.org/viewvc?view=rev&root=coreboot-v3&revision=660
and do it in a similar place

> b) coreboot prints:
> Before VSA:
> do_vsmbios
> buf ilen 1011820 olen949065
> buf 00060000 *buf 255 buf[256k] 255
> buf[0x20] signature is ff:ff:ff:ff
> do_vsmbios: no vsainit.bin signature, skipping!
> After VSA:
> Graphics init...
> VRC_VG value: 0xffff
> Finding PCI configuration type.
> PCI: Sanity check failed
> pci_check_direct failed

I guess this isn't related to the dongle and it's 4MB mode, as that's
just really useful post-BIOS at payload time, unless you are trying to
fit the ROM into more than 1MB.
But at a glance it seems like you don't have the VSA blob included in
flash? Is this coreboot-v2 or coreboot-v3?

> Anybody can help me?

Mart Raudsepp
Artec Design LLC

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