[coreboot] Jetway J7F4K1G2E

Richard Stellingwerff remenic at gmail.com
Mon May 19 17:21:50 CEST 2008


The epia-cn patch boots Linux on the Jetway J7F4K1G2E, but both nics don't work.

Here's the output from superiotool -dV (omitted everything that failed):

Probing for Fintek Super I/O at 0x4e...
Found Fintek F71805F/FG (vid=0x3419, id=0x0604) at 0x4e
Register dump:
idx 07 20 21 23 24 25 26 27  28 29
val 0a 04 06 19 34 00 00 20  08 00
def NA 04 06 19 34 00 00 3f  08 00
LDN 0x00 (Floppy)
idx 30 60 61 70 74 f0 f2 f4
val 00 00 00 00 04 0e ff 00
def 01 03 f0 06 02 0e 03 00
LDN 0x01 (COM1)
idx 30 60 61 70 f0
val 01 03 f8 04 00
def 01 03 f8 04 00
LDN 0x02 (COM2)
idx 30 60 61 70 f0 f1
val 01 02 f8 03 00 44
def 01 02 f8 03 00 04
LDN 0x03 (Parallel port)
idx 30 60 61 70 74 f0
val 01 03 78 07 04 00
def 01 03 78 07 03 42
LDN 0x04 (Hardware monitor)
idx 30 60 61 70
val 01 02 95 00
def 00 02 95 00
LDN 0x06 (GPIO)
idx 70 e0 e1 e2 e3 e4 e5 e6  e7 e8 e9 f0 f1 f3 f4
val 00 00 00 60 00 00 00 00  00 00 9f 00 00 00 00
def 00 00 00 NA 00 00 00 00  00 00 00 00 NA 00 NA
LDN 0x0a (PME)
idx 30 f0 f1
val 01 00 06
def 00 00 00

And from lspci -tvnn:

-[0000:00]-+-00.0  VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro
Host Bridge [1106:0314]
           +-00.1  VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro
Host Bridge [1106:1314]
           +-00.2  VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro
Host Bridge [1106:2314]
           +-00.3  VIA Technologies, Inc. PT890 Host Bridge [1106:3208]
           +-00.4  VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro
Host Bridge [1106:4314]
           +-00.7  VIA Technologies, Inc. CN700/VN800/P4M800CE/Pro
Host Bridge [1106:7314]
           +-01.0-[0000:01]----00.0  VIA Technologies, Inc. UniChrome
Pro IGP [1106:3344]
           +-09.0  Realtek Semiconductor Co., Ltd. RTL-8110SC/8169SC
Gigabit Ethernet [10ec:8167]
           +-0b.0  Realtek Semiconductor Co., Ltd. RTL-8110SC/8169SC
Gigabit Ethernet [10ec:8167]
           +-0f.0  VIA Technologies, Inc. VIA VT6420 SATA RAID
Controller [1106:3149]
           +-0f.1  VIA Technologies, Inc.
VT82C586A/B/VT82C686/A/B/VT823x/A/C PIPC Bus Master IDE [1106:0571]
           +-10.0  VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1
Controller [1106:3038]
           +-10.1  VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1
Controller [1106:3038]
           +-10.2  VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1
Controller [1106:3038]
           +-10.3  VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1
Controller [1106:3038]
           +-10.4  VIA Technologies, Inc. USB 2.0 [1106:3104]
           +-11.0  VIA Technologies, Inc. VT8237 ISA bridge
[KT600/K8T800/K8T890 South] [1106:3227]
           \-11.5  VIA Technologies, Inc. VT8233/A/8235/8237 AC97
Audio Controller [1106:3059]



irq_tables.c (generated by getpir):

/* This file was generated by getpir.c, do not modify!
 * (but if you do, please run checkpir on it to verify)
 *
 * Contains the IRQ Routing Table dumped directly from your
 * memory, which BIOS sets up.
 *
 * Documentation at: http://www.microsoft.com/whdc/archive/pciirq.mspx
 */

#ifdef GETPIR
#include "pirq_routing.h"
#else
#include <arch/pirq_routing.h>
#endif

const struct irq_routing_table intel_irq_routing_table = {
        PIRQ_SIGNATURE,  /* u32 signature */
        PIRQ_VERSION,    /* u16 version   */
        32+16*10,        /* There can be total 10 devices on the bus */
        0x00,            /* Where the interrupt router lies (bus) */
        (0x11<<3)|0x0,   /* Where the interrupt router lies (dev) */
        0xc20,           /* IRQs devoted exclusively to PCI usage */
        0x1106,          /* Vendor */
        0x596,           /* Device */
        0,               /* Crap (miniport) */
        { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
        0x50,            /* u8 checksum. This has to be set to some
                            value that would give 0 after the sum of all
                            bytes for this structure (including checksum) */
        {
                /* bus,     dev|fn,   {link, bitmap}, {link, bitmap},
{link, bitmap}, {link, bitmap},  slot, rfu */
                {0x00,(0x08<<3)|0x0, {{0x02, 0xdea0}, {0x03, 0xdea0},
{0x04, 0xdea0}, {0x01, 0x0dea0}}, 0x1, 0x0},
                {0x00,(0x09<<3)|0x0, {{0x03, 0xdea0}, {0x04, 0xdea0},
{0x01, 0xdea0}, {0x02, 0x0dea0}}, 0x2, 0x0},
                {0x00,(0x0a<<3)|0x0, {{0x04, 0xdea0}, {0x01, 0xdea0},
{0x02, 0xdea0}, {0x03, 0x0dea0}}, 0x3, 0x0},
                {0x00,(0x0b<<3)|0x0, {{0x04, 0xdea0}, {0x01, 0xdea0},
{0x02, 0xdea0}, {0x03, 0x0dea0}}, 0x4, 0x0},
                {0x00,(0x0c<<3)|0x0, {{0x01, 0xdea0}, {0x02, 0xdea0},
{0x03, 0xdea0}, {0x04, 0x0dea0}}, 0x5, 0x0},
                {0x00,(0x0d<<3)|0x0, {{0x01, 0xdea0}, {0x02, 0xdea0},
{0x03, 0xdea0}, {0x04, 0x0dea0}}, 0x6, 0x0},
                {0x00,(0x11<<3)|0x0, {{0x00, 0xdea0}, {0x00, 0xdea0},
{0x03, 0xdea0}, {0x04, 0x0dea0}}, 0x0, 0x0},
                {0x00,(0x0f<<3)|0x0, {{0x01, 0xdea0}, {0x02, 0xdea0},
{0x03, 0xdea0}, {0x04, 0x0dea0}}, 0x0, 0x0},
                {0x00,(0x01<<3)|0x0, {{0x01, 0xdea0}, {0x02, 0xdea0},
{0x03, 0xdea0}, {0x04, 0x0dea0}}, 0x0, 0x0},
                {0x00,(0x10<<3)|0x0, {{0x01, 0xdea0}, {0x02, 0xdea0},
{0x03, 0xdea0}, {0x04, 0x0dea0}}, 0x0, 0x0},
        }
};

unsigned long write_pirq_routing_table(unsigned long addr)
{
        return copy_pirq_routing_table(addr);
}




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