[coreboot] r3327 - trunk/util/flashrom

svn at coreboot.org svn at coreboot.org
Fri May 16 16:39:39 CEST 2008


Author: hailfinger
Date: 2008-05-16 16:39:39 +0200 (Fri, 16 May 2008)
New Revision: 3327

Modified:
   trunk/util/flashrom/chipset_enable.c
Log:
ICH8 and ICH9 have an almost identical SPI interface, only the location
of the SPIBAR differs. Add ICH8 support to the ICH9 code.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Stefan Reinauer <stepan at coresystems.de>


Modified: trunk/util/flashrom/chipset_enable.c
===================================================================
--- trunk/util/flashrom/chipset_enable.c	2008-05-16 13:00:28 UTC (rev 3326)
+++ trunk/util/flashrom/chipset_enable.c	2008-05-16 14:39:39 UTC (rev 3327)
@@ -234,13 +234,19 @@
 	return enable_flash_ich_dc(dev, name);
 }
 
-static int enable_flash_ich78(struct pci_dev *dev, const char *name)
+static int enable_flash_ich7(struct pci_dev *dev, const char *name)
 {
 	return enable_flash_ich_dc_spi(dev, name, 0x3020);
 }
 
 int ich9_detected = 0;
 
+static int enable_flash_ich8(struct pci_dev *dev, const char *name)
+{
+	ich9_detected = 1;
+	return enable_flash_ich_dc_spi(dev, name, 0x3020);
+}
+
 static int enable_flash_ich9(struct pci_dev *dev, const char *name)
 {
 	ich9_detected = 1;
@@ -597,15 +603,15 @@
 	{0x8086, 0x25a1, "Intel 6300ESB",	enable_flash_ich_4e},
 	{0x8086, 0x2640, "Intel ICH6/ICH6R",	enable_flash_ich_dc},
 	{0x8086, 0x2641, "Intel ICH6-M",	enable_flash_ich_dc},
-	{0x8086, 0x27b0, "Intel ICH7DH",	enable_flash_ich78},
-	{0x8086, 0x27b8, "Intel ICH7/ICH7R",	enable_flash_ich78},
-	{0x8086, 0x27b9, "Intel ICH7M",		enable_flash_ich78},
-	{0x8086, 0x27bd, "Intel ICH7MDH",	enable_flash_ich78},
-	{0x8086, 0x2810, "Intel ICH8/ICH8R",	enable_flash_ich78},
-	{0x8086, 0x2811, "Intel ICH8M-E",	enable_flash_ich78},
-	{0x8086, 0x2812, "Intel ICH8DH",	enable_flash_ich78},
-	{0x8086, 0x2814, "Intel ICH8DO",	enable_flash_ich78},
-	{0x8086, 0x2815, "Intel ICH8M",		enable_flash_ich78},
+	{0x8086, 0x27b0, "Intel ICH7DH",	enable_flash_ich7},
+	{0x8086, 0x27b8, "Intel ICH7/ICH7R",	enable_flash_ich7},
+	{0x8086, 0x27b9, "Intel ICH7M",		enable_flash_ich7},
+	{0x8086, 0x27bd, "Intel ICH7MDH",	enable_flash_ich7},
+	{0x8086, 0x2810, "Intel ICH8/ICH8R",	enable_flash_ich8},
+	{0x8086, 0x2811, "Intel ICH8M-E",	enable_flash_ich8},
+	{0x8086, 0x2812, "Intel ICH8DH",	enable_flash_ich8},
+	{0x8086, 0x2814, "Intel ICH8DO",	enable_flash_ich8},
+	{0x8086, 0x2815, "Intel ICH8M",		enable_flash_ich8},
 	{0x8086, 0x2912, "Intel ICH9DH",	enable_flash_ich9},
 	{0x8086, 0x2914, "Intel ICH9DO",	enable_flash_ich9},
 	{0x8086, 0x2916, "Intel ICH9R",		enable_flash_ich9},





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