[coreboot] [PATCH] flashrom: force-enable LPC-to-SPI write cycle translation for IT8716F
Peter Stuge
peter at stuge.se
Fri May 16 02:10:41 CEST 2008
On Fri, May 16, 2008 at 02:01:44AM +0200, Carl-Daniel Hailfinger wrote:
> New patch.
>
> On 15.05.2008 16:39, Carl-Daniel Hailfinger wrote:
> > Force-enable LPC write cycle to SPI write cycle translation
> > for IT8716F.
> >
> > Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
> >
>
> Enable IT8716F LPC-to-SPI write cycle translation if the IT8716F decodes
> any address to the attached SPI ROM.
>
> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Peter Stuge <peter at stuge.se>
> Index: flashrom-ron/it87spi.c
> ===================================================================
> --- flashrom-ron/it87spi.c (Revision 3321)
> +++ flashrom-ron/it87spi.c (Arbeitskopie)
> @@ -93,6 +93,12 @@
> 0xFFF80000, 0xFFFEFFFF, (tmp & 1 << 3) ? "en" : "dis");
> printf("LPC write to serial flash %sabled\n",
> (tmp & 1 << 4) ? "en" : "dis");
> + /* If any serial flash segment is enabled, enable writing. */
> + if ((tmp & 0xe) && (!(tmp & 1 << 4))) {
> + printf("Enabling LPC write to serial flash\n");
> + tmp |= 1 << 4;
> + regwrite(port, 0x24, tmp);
> + }
> printf("serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29);
> /* LDN 0x7, reg 0x64/0x65 */
> regwrite(port, 0x07, 0x7);
More information about the coreboot
mailing list